Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places...

[factor.git] / basis / compiler / cfg / linear-scan / resolve / resolve-tests.factor

diff --git a/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor b/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
index 7e308cf231dc2044a41cca86f55f96d6ec2a588f..47c1f0ae76e673c6bc0b211708494cd933bf33e7 100644 (file)
--- a/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
+++ b/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
@@ -1,154 +1,67 @@
-USING: accessors arrays classes compiler.cfg
-compiler.cfg.debugger compiler.cfg.instructions
-compiler.cfg.linear-scan.debugger
-compiler.cfg.linear-scan.live-intervals
-compiler.cfg.linear-scan.numbering
-compiler.cfg.linear-scan.allocation.state
-compiler.cfg.linear-scan.resolve compiler.cfg.predecessors
-compiler.cfg.registers compiler.cfg.rpo cpu.architecture kernel
-namespaces tools.test vectors ;
+USING: compiler.cfg.linear-scan.resolve tools.test kernel namespaces
+accessors
+compiler.cfg
+compiler.cfg.instructions cpu.architecture make sequences
+compiler.cfg.linear-scan.allocation.state ;
 IN: compiler.cfg.linear-scan.resolve.tests
 
-[ { 1 2 3 4 5 6 } ] [
-    { 3 4 } V{ 1 2 } clone [ { 5 6 } 3append-here ] keep >array
-] unit-test
-
-H{ { int-regs 10 } { float-regs 20 } } clone spill-counts set
-H{ } clone spill-temps set
-
 [
     {
-        T{ _copy { dst 5 } { src 4 } { class int-regs } }
-        T{ _spill { src 1 } { class int-regs } { n 10 } }
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _reload { dst 0 } { class int-regs } { n 10 } }
-        T{ _spill { src 1 } { class float-regs } { n 20 } }
-        T{ _copy { dst 1 } { src 0 } { class float-regs } }
-        T{ _reload { dst 0 } { class float-regs } { n 20 } }
+        { { T{ spill-slot f 0 } int-rep } { 1 int-rep } }
     }
 ] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 1 } { to 0 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 1 } { reg-class float-regs } }
-        T{ register->register { from 1 } { to 0 } { reg-class float-regs } }
-        T{ register->register { from 4 } { to 5 } { reg-class int-regs } }
-    } mapping-instructions
-] unit-test
-
-[
-    {
-        T{ _spill { src 2 } { class int-regs } { n 10 } }
-        T{ _copy { dst 2 } { src 1 } { class int-regs } }
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _reload { dst 0 } { class int-regs } { n 10 } }
-    }
-] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
-        T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
-    } mapping-instructions
-] unit-test
-
-[
-    {
-        T{ _spill { src 0 } { class int-regs } { n 10 } }
-        T{ _copy { dst 0 } { src 2 } { class int-regs } }
-        T{ _copy { dst 2 } { src 1 } { class int-regs } }
-        T{ _reload { dst 1 } { class int-regs } { n 10 } }
-    }
-] [
-    {
-        T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
-        T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-    } mapping-instructions
+    [
+        0 <spill-slot> 1 int-rep add-mapping
+    ] { } make
 ] unit-test
 
 [
     {
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _copy { dst 2 } { src 0 } { class int-regs } }
+        T{ _reload { dst 1 } { rep int-rep } { n 0 } }
     }
 ] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
-    } mapping-instructions
-] unit-test
-
-[
-    { }
-] [
-    {
-       T{ register->register { from 4 } { to 4 } { reg-class int-regs } }
-    } mapping-instructions
+    [
+        { T{ spill-slot f 0 } int-rep } { 1 int-rep } >insn
+    ] { } make
 ] unit-test
 
 [
     {
-        T{ _spill { src 3 } { class int-regs } { n 4 } }
-        T{ _reload { dst 2 } { class int-regs } { n 1 } } 
+        T{ _spill { src 1 } { rep int-rep } { n 0 } }
     }
 ] [
-    {
-        T{ register->memory { from 3 } { to T{ spill-slot f 4 } } { reg-class int-regs } }
-        T{ memory->register { from T{ spill-slot f 1 } } { to 2 } { reg-class int-regs } }
-    } mapping-instructions
+    [
+        { 1 int-rep } { T{ spill-slot f 0 } int-rep } >insn
+    ] { } make
 ] unit-test
 
-
 [
     {
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _copy { dst 2 } { src 0 } { class int-regs } }
-        T{ _copy { dst 0 } { src 3 } { class int-regs } }
+        T{ ##copy { src 1 } { dst 2 } { rep int-rep } }
     }
 ] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
-    } mapping-instructions
+    [
+        { 1 int-rep } { 2 int-rep } >insn
+    ] { } make
 ] unit-test
 
-[
-    {
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _copy { dst 2 } { src 0 } { class int-regs } }
-        T{ _spill { src 4 } { class int-regs } { n 10 } }
-        T{ _copy { dst 4 } { src 0 } { class int-regs } }
-        T{ _copy { dst 0 } { src 3 } { class int-regs } }
-        T{ _reload { dst 3 } { class int-regs } { n 10 } }
-    }
-] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
-        T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
-        T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
-    } mapping-instructions
-] unit-test
+cfg new 8 >>spill-area-size cfg set
+H{ } clone spill-temps set
 
 [
-    {
-        T{ _copy { dst 2 } { src 0 } { class int-regs } }
-        T{ _copy { dst 9 } { src 1 } { class int-regs } }
-        T{ _copy { dst 1 } { src 0 } { class int-regs } }
-        T{ _spill { src 4 } { class int-regs } { n 10 } }
-        T{ _copy { dst 4 } { src 0 } { class int-regs } }
-        T{ _copy { dst 0 } { src 3 } { class int-regs } }
-        T{ _reload { dst 3 } { class int-regs } { n 10 } }
-    }
+    t
 ] [
-    {
-        T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
-        T{ register->register { from 1 } { to 9 } { reg-class int-regs } }
-        T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
-        T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
-        T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
-    } mapping-instructions
+    { { { 0 int-rep } { 1 int-rep } } { { 1 int-rep } { 0 int-rep } } }
+    mapping-instructions {
+        {
+            T{ _spill { src 0 } { rep int-rep } { n 8 } }
+            T{ ##copy { dst 0 } { src 1 } { rep int-rep } }
+            T{ _reload { dst 1 } { rep int-rep } { n 8 } }
+        }
+        {
+            T{ _spill { src 1 } { rep int-rep } { n 8 } }
+            T{ ##copy { dst 1 } { src 0 } { rep int-rep } }
+            T{ _reload { dst 0 } { rep int-rep } { n 8 } }
+        }
+    } member?
 ] unit-test