-! Copyright (C) 2007, 2010 Slava Pestov.
+! Copyright (C) 2007, 2011 Slava Pestov.
! See http://factorcode.org/license.txt for BSD license.
USING: bootstrap.image.private kernel kernel.private namespaces
-system layouts vocabs parser compiler.constants math
-math.private cpu.x86.assembler cpu.x86.assembler.operands
-sequences generic.single.private threads.private ;
+system layouts vocabs parser compiler.constants
+compiler.codegen.relocation math math.private cpu.x86.assembler
+cpu.x86.assembler.operands sequences generic.single.private
+threads.private locals ;
IN: bootstrap.x86
8 \ cell set
: rex-length ( -- n ) 1 ;
: jit-call ( name -- )
- RAX 0 MOV rc-absolute-cell jit-dlsym
+ RAX 0 MOV f rc-absolute-cell rel-dlsym
RAX CALL ;
[
! load entry point
- RAX 0 MOV rc-absolute-cell rt-this jit-rel
- ! save stack frame size
- stack-frame-size PUSH
- ! push entry point
- RAX PUSH
+ RAX 0 MOV rc-absolute-cell rel-this
! alignment
- RSP stack-frame-size 3 bootstrap-cells - SUB
+ RSP stack-frame-size bootstrap-cell - SUB
+ ! store entry point
+ RSP stack-frame-size 3 bootstrap-cells - [+] RAX MOV
+ ! store stack frame size
+ RSP stack-frame-size 2 bootstrap-cells - [+] stack-frame-size MOV
] jit-prolog jit-define
[
pic-tail-reg 5 [RIP+] LEA
- 0 JMP rc-relative rt-entry-point-pic-tail jit-rel
+ 0 JMP f rc-relative rel-word-pic-tail
] jit-word-jump jit-define
: jit-load-context ( -- )
jit-save-context
! call the primitive
arg1 vm-reg MOV
- RAX 0 MOV rc-absolute-cell rt-dlsym jit-rel
+ RAX 0 MOV f f rc-absolute-cell rel-dlsym
RAX CALL
jit-restore-context
] jit-primitive jit-define
"end_callback" jit-call
] \ c-to-factor define-sub-primitive
+: signal-handler-save-regs ( -- regs )
+ { RAX RCX RDX RBX RBP RSI RDI R8 R9 R10 R11 R12 R13 R14 R15 } ;
+
+:: jit-signal-handler-prolog ( -- frame-size )
+ signal-handler-save-regs :> save-regs
+ save-regs length 1 + bootstrap-cells 16 align stack-frame-size + :> frame-size
+ ! minus a cell each for flags, return address
+ ! use LEA so we don't dirty flags
+ RSP RSP frame-size 2 bootstrap-cells - neg [+] LEA
+ save-regs [| r i | RSP i bootstrap-cells [+] r MOV ] each-index
+ PUSHF
+ ! Now that the registers are saved, we can make the stack frame
+ RAX 0 MOV rc-absolute-cell rel-this
+ RSP frame-size 3 bootstrap-cells - [+] RAX MOV
+ RSP frame-size 2 bootstrap-cells - [+] frame-size MOV
+ frame-size ;
+
+:: jit-signal-handler-epilog ( frame-size -- )
+ POPF
+ signal-handler-save-regs
+ [| r i | r RSP i bootstrap-cells [+] MOV ] each-index
+ RSP RSP frame-size 2 bootstrap-cells - [+] LEA ;
+
[
arg1 ds-reg [] MOV
ds-reg bootstrap-cell SUB
! Load VM pointer into vm-reg, since we're entering from
! C code
- vm-reg 0 MOV 0 rc-absolute-cell jit-vm
+ vm-reg 0 MOV 0 rc-absolute-cell rel-vm
! Load ds and rs registers
jit-load-context
jit-restore-context
+ ! Clear the fault flag
+ vm-reg vm-fault-flag-offset [+] 0 MOV
+
! Call quotation
jit-jump-quot
] \ unwind-native-frames define-sub-primitive
\ lazy-jit-compile define-combinator-primitive
[
- temp2 HEX: ffffffff MOV rc-absolute-cell rt-literal jit-rel
+ temp2 0xffffffff MOV f rc-absolute-cell rel-literal
temp1 temp2 CMP
] pic-check-tuple jit-define
jit-save-context
arg1 RBX MOV
arg2 vm-reg MOV
- "inline_cache_miss" jit-call
+ RAX 0 MOV rc-absolute-cell rel-inline-cache-miss
+ RAX CALL
jit-load-context
jit-restore-context ;
jit-push-param
jit-jump-quot ;
+[
+ 0 [RIP+] EAX MOV rc-relative rel-safepoint
+] \ jit-safepoint jit-define
+
[
jit-start-context-and-delete
] \ (start-context-and-delete) define-sub-primitive