Merge branch 'master' into more_aggressive_coalescing

[factor.git] / basis / cpu / x86 / x86.factor

diff --git a/basis/cpu/x86/x86.factor b/basis/cpu/x86/x86.factor
index 51b5cef23a334ce9060c6b051e0cdb89a4a71891..e78519b9e0f389242bd78640176f700e9768d036 100644 (file)
--- a/basis/cpu/x86/x86.factor
+++ b/basis/cpu/x86/x86.factor
@@ -20,8 +20,6 @@ IN: cpu.x86
 M: label JMP 0 JMP rc-relative label-fixup ;
 M: label JUMPcc [ 0 ] dip JUMPcc rc-relative label-fixup ;
 
-M: x86 two-operand? t ;
-
 M: x86 vector-regs float-regs ;
 
 HOOK: stack-reg cpu ( -- reg )
@@ -102,26 +100,35 @@ M: x86 %slot-imm ( dst obj slot tag -- ) (%slot-imm) MOV ;
 M: x86 %set-slot ( src obj slot -- ) [+] swap MOV ;
 M: x86 %set-slot-imm ( src obj slot tag -- ) (%slot-imm) swap MOV ;
 
+:: two-operand ( dst src1 src2 rep -- dst src )
+    dst src2 eq? [ "Cannot handle this case" throw ] when
+    dst src1 rep %copy
+    dst src2 ; inline
+
+:: one-operand ( dst src rep -- dst )
+    dst src rep %copy
+    dst ; inline
+
 M: x86 %add     2over eq? [ nip ADD ] [ [+] LEA ] if ;
 M: x86 %add-imm 2over eq? [ nip ADD ] [ [+] LEA ] if ;
-M: x86 %sub     nip SUB ;
+M: x86 %sub     int-rep two-operand SUB ;
 M: x86 %sub-imm 2over eq? [ nip SUB ] [ neg [+] LEA ] if ;
-M: x86 %mul     nip swap IMUL2 ;
+M: x86 %mul     int-rep two-operand swap IMUL2 ;
 M: x86 %mul-imm IMUL3 ;
-M: x86 %and     nip AND ;
-M: x86 %and-imm nip AND ;
-M: x86 %or      nip OR ;
-M: x86 %or-imm  nip OR ;
-M: x86 %xor     nip XOR ;
-M: x86 %xor-imm nip XOR ;
-M: x86 %shl-imm nip SHL ;
-M: x86 %shr-imm nip SHR ;
-M: x86 %sar-imm nip SAR ;
-
-M: x86 %min     nip [ CMP ] [ CMOVG ] 2bi ;
-M: x86 %max     nip [ CMP ] [ CMOVL ] 2bi ;
-
-M: x86 %not     drop NOT ;
+M: x86 %and     int-rep two-operand AND ;
+M: x86 %and-imm int-rep two-operand AND ;
+M: x86 %or      int-rep two-operand OR ;
+M: x86 %or-imm  int-rep two-operand OR ;
+M: x86 %xor     int-rep two-operand XOR ;
+M: x86 %xor-imm int-rep two-operand XOR ;
+M: x86 %shl-imm int-rep two-operand SHL ;
+M: x86 %shr-imm int-rep two-operand SHR ;
+M: x86 %sar-imm int-rep two-operand SAR ;
+
+M: x86 %min     int-rep two-operand [ CMP ] [ CMOVG ] 2bi ;
+M: x86 %max     int-rep two-operand [ CMP ] [ CMOVL ] 2bi ;
+
+M: x86 %not     int-rep one-operand NOT ;
 M: x86 %log2    BSR ;
 
 GENERIC: copy-register* ( dst src rep -- )
@@ -140,18 +147,14 @@ M: x86 %copy ( dst src rep -- )
         copy-register*
     ] if ;
 
-:: overflow-template ( label dst src1 src2 insn -- )
-    src1 src2 insn call
-    label JO ; inline
-
 M: x86 %fixnum-add ( label dst src1 src2 -- )
-    [ ADD ] overflow-template ;
+    int-rep two-operand ADD JO ;
 
 M: x86 %fixnum-sub ( label dst src1 src2 -- )
-    [ SUB ] overflow-template ;
+    int-rep two-operand SUB JO ;
 
 M: x86 %fixnum-mul ( label dst src1 src2 -- )
-    [ swap IMUL2 ] overflow-template ;
+    int-rep two-operand swap IMUL2 JO ;
 
 : bignum@ ( reg n -- op )
     cells bignum tag-number - [+] ; inline
@@ -213,12 +216,12 @@ M:: x86 %bignum>integer ( dst src temp -- )
         "end" resolve-label
     ] with-scope ;
 
-M: x86 %add-float nip ADDSD ;
-M: x86 %sub-float nip SUBSD ;
-M: x86 %mul-float nip MULSD ;
-M: x86 %div-float nip DIVSD ;
-M: x86 %min-float nip MINSD ;
-M: x86 %max-float nip MAXSD ;
+M: x86 %add-float double-rep two-operand ADDSD ;
+M: x86 %sub-float double-rep two-operand SUBSD ;
+M: x86 %mul-float double-rep two-operand MULSD ;
+M: x86 %div-float double-rep two-operand DIVSD ;
+M: x86 %min-float double-rep two-operand MINSD ;
+M: x86 %max-float double-rep two-operand MAXSD ;
 M: x86 %sqrt SQRTSD ;
 
 M: x86 %single>double-float CVTSS2SD ;
@@ -302,6 +305,7 @@ M: x86 %gather-vector-2-reps
     } available-reps ;
 
 M: x86 %add-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ ADDPS ] }
         { double-2-rep [ ADDPD ] }
@@ -313,7 +317,7 @@ M: x86 %add-vector ( dst src1 src2 rep -- )
         { uint-4-rep [ PADDD ] }
         { longlong-2-rep [ PADDQ ] }
         { ulonglong-2-rep [ PADDQ ] }
-    } case drop ;
+    } case ;
 
 M: x86 %add-vector-reps
     {
@@ -322,12 +326,13 @@ M: x86 %add-vector-reps
     } available-reps ;
 
 M: x86 %saturated-add-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { char-16-rep [ PADDSB ] }
         { uchar-16-rep [ PADDUSB ] }
         { short-8-rep [ PADDSW ] }
         { ushort-8-rep [ PADDUSW ] }
-    } case drop ;
+    } case ;
 
 M: x86 %saturated-add-vector-reps
     {
@@ -335,10 +340,11 @@ M: x86 %saturated-add-vector-reps
     } available-reps ;
 
 M: x86 %add-sub-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ ADDSUBPS ] }
         { double-2-rep [ ADDSUBPD ] }
-    } case drop ;
+    } case ;
 
 M: x86 %add-sub-vector-reps
     {
@@ -346,6 +352,7 @@ M: x86 %add-sub-vector-reps
     } available-reps ;
 
 M: x86 %sub-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ SUBPS ] }
         { double-2-rep [ SUBPD ] }
@@ -357,7 +364,7 @@ M: x86 %sub-vector ( dst src1 src2 rep -- )
         { uint-4-rep [ PSUBD ] }
         { longlong-2-rep [ PSUBQ ] }
         { ulonglong-2-rep [ PSUBQ ] }
-    } case drop ;
+    } case ;
 
 M: x86 %sub-vector-reps
     {
@@ -366,12 +373,13 @@ M: x86 %sub-vector-reps
     } available-reps ;
 
 M: x86 %saturated-sub-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { char-16-rep [ PSUBSB ] }
         { uchar-16-rep [ PSUBUSB ] }
         { short-8-rep [ PSUBSW ] }
         { ushort-8-rep [ PSUBUSW ] }
-    } case drop ;
+    } case ;
 
 M: x86 %saturated-sub-vector-reps
     {
@@ -379,6 +387,7 @@ M: x86 %saturated-sub-vector-reps
     } available-reps ;
 
 M: x86 %mul-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ MULPS ] }
         { double-2-rep [ MULPD ] }
@@ -386,7 +395,7 @@ M: x86 %mul-vector ( dst src1 src2 rep -- )
         { ushort-8-rep [ PMULLW ] }
         { int-4-rep [ PMULLD ] }
         { uint-4-rep [ PMULLD ] }
-    } case drop ;
+    } case ;
 
 M: x86 %mul-vector-reps
     {
@@ -400,10 +409,11 @@ M: x86 %saturated-mul-vector-reps
     { } ;
 
 M: x86 %div-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ DIVPS ] }
         { double-2-rep [ DIVPD ] }
-    } case drop ;
+    } case ;
 
 M: x86 %div-vector-reps
     {
@@ -412,6 +422,7 @@ M: x86 %div-vector-reps
     } available-reps ;
 
 M: x86 %min-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { char-16-rep [ PMINSB ] }
         { uchar-16-rep [ PMINUB ] }
@@ -421,7 +432,7 @@ M: x86 %min-vector ( dst src1 src2 rep -- )
         { uint-4-rep [ PMINUD ] }
         { float-4-rep [ MINPS ] }
         { double-2-rep [ MINPD ] }
-    } case drop ;
+    } case ;
 
 M: x86 %min-vector-reps
     {
@@ -431,6 +442,7 @@ M: x86 %min-vector-reps
     } available-reps ;
 
 M: x86 %max-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { char-16-rep [ PMAXSB ] }
         { uchar-16-rep [ PMAXUB ] }
@@ -440,7 +452,7 @@ M: x86 %max-vector ( dst src1 src2 rep -- )
         { uint-4-rep [ PMAXUD ] }
         { float-4-rep [ MAXPS ] }
         { double-2-rep [ MAXPD ] }
-    } case drop ;
+    } case ;
 
 M: x86 %max-vector-reps
     {
@@ -485,11 +497,12 @@ M: x86 %sqrt-vector-reps
     } available-reps ;
 
 M: x86 %and-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ ANDPS ] }
         { double-2-rep [ ANDPD ] }
         [ drop PAND ]
-    } case drop ;
+    } case ;
 
 M: x86 %and-vector-reps
     {
@@ -498,11 +511,12 @@ M: x86 %and-vector-reps
     } available-reps ;
 
 M: x86 %or-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ ORPS ] }
         { double-2-rep [ ORPD ] }
         [ drop POR ]
-    } case drop ;
+    } case ;
 
 M: x86 %or-vector-reps
     {
@@ -511,11 +525,12 @@ M: x86 %or-vector-reps
     } available-reps ;
 
 M: x86 %xor-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { float-4-rep [ XORPS ] }
         { double-2-rep [ XORPD ] }
         [ drop PXOR ]
-    } case drop ;
+    } case ;
 
 M: x86 %xor-vector-reps
     {
@@ -524,6 +539,7 @@ M: x86 %xor-vector-reps
     } available-reps ;
 
 M: x86 %shl-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { short-8-rep [ PSLLW ] }
         { ushort-8-rep [ PSLLW ] }
@@ -531,7 +547,7 @@ M: x86 %shl-vector ( dst src1 src2 rep -- )
         { uint-4-rep [ PSLLD ] }
         { longlong-2-rep [ PSLLQ ] }
         { ulonglong-2-rep [ PSLLQ ] }
-    } case drop ;
+    } case ;
 
 M: x86 %shl-vector-reps
     {
@@ -539,13 +555,14 @@ M: x86 %shl-vector-reps
     } available-reps ;
 
 M: x86 %shr-vector ( dst src1 src2 rep -- )
+    [ two-operand ] keep
     {
         { short-8-rep [ PSRAW ] }
         { ushort-8-rep [ PSRLW ] }
         { int-4-rep [ PSRAD ] }
         { uint-4-rep [ PSRLD ] }
         { ulonglong-2-rep [ PSRLQ ] }
-    } case drop ;
+    } case ;
 
 M: x86 %shr-vector-reps
     {