#define FACTOR_CPU_STRING "ppc.32"
#endif
-#define CALLSTACK_BOTTOM(ctx) (void*)(ctx->callstack_seg->end - 32)
+#define CALLSTACK_BOTTOM(ctx) (ctx->callstack_seg->end - 32)
-/* In the instruction sequence:
+// In the instruction sequence:
- LOAD32 r3,...
- B blah
+// LOAD32 r3,...
+// B blah
- the offset from the immediate operand to LOAD32 to the instruction after
- the branch is one instruction. */
+// the offset from the immediate operand to LOAD32 to the instruction after
+// the branch is one instruction.
static const fixnum xt_tail_pic_offset = 4;
inline static void check_call_site(cell return_address) {
uint32_t insn = *(uint32_t*)return_address;
- /* Check that absolute bit is 0 */
+ // Check that absolute bit is 0
FACTOR_ASSERT((insn & 0x2) == 0x0);
- /* Check that instruction is branch */
+ // Check that instruction is branch
FACTOR_ASSERT((insn >> 26) == 0x12);
}
return (void*)(signed_addr + return_address);
}
-inline static void set_call_target(cell return_address, void* target) {
+inline static void set_call_target(cell return_address, cell target) {
return_address -= 4;
check_call_site(return_address);
uint32_t insn = *(uint32_t*)return_address;
- fixnum relative_address = ((cell) target - return_address);
+ fixnum relative_address = target - return_address;
insn = ((insn & ~b_mask) | (relative_address & b_mask));
*(uint32_t*)return_address = insn;
- /* Flush the cache line containing the call we just patched */
+ // Flush the cache line containing the call we just patched
__asm__ __volatile__("icbi 0, %0\n"
"sync\n" ::"r"(return_address)
:);
return r;
}
-/* Defined in assembly */
+// Defined in assembly
VM_C_API void flush_icache(cell start, cell len);
}