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[factor.git] / vm / cpu-ppc.hpp

diff --git a/vm/cpu-ppc.hpp b/vm/cpu-ppc.hpp
index d0036fb84f038bcfcbce1d191e53ae2c6e830c36..dce40cdb2823c9ce7874762600fb3c2436bdf62d 100644 (file)
--- a/vm/cpu-ppc.hpp
+++ b/vm/cpu-ppc.hpp
@@ -1,95 +1,82 @@
-namespace factor
-{
+namespace factor {
 
-#define FACTOR_CPU_STRING "ppc"
-#define VM_ASM_API VM_C_API
-#define VM_ASM_API_OVERFLOW VM_C_API
+#ifdef FACTOR_64
+#define FACTOR_CPU_STRING "ppc.64"
+#else
+#define FACTOR_CPU_STRING "ppc.32"
+#endif
 
-register cell ds asm("r13");
-register cell rs asm("r14");
+#define CALLSTACK_BOTTOM(ctx) (ctx->callstack_seg->end - 32)
 
-/* In the instruction sequence:
+// In the instruction sequence:
 
-   LOAD32 r3,...
-   B blah
+// LOAD32 r3,...
+// B blah
 
-   the offset from the immediate operand to LOAD32 to the instruction after
-   the branch is two instructions. */
-static const fixnum xt_tail_pic_offset = 4 * 2;
+// the offset from the immediate operand to LOAD32 to the instruction after
+// the branch is one instruction.
+static const fixnum xt_tail_pic_offset = 4;
 
-inline static void check_call_site(cell return_address)
-{
-#ifdef FACTOR_DEBUG
-       cell insn = *(cell *)return_address;
-       /* Check that absolute bit is 0 */
-       assert((insn & 0x2) == 0x0);
-       /* Check that instruction is branch */
-       assert((insn >> 26) == 0x12);
-#endif
+inline static void check_call_site(cell return_address) {
+  uint32_t insn = *(uint32_t*)return_address;
+  // Check that absolute bit is 0
+  FACTOR_ASSERT((insn & 0x2) == 0x0);
+  // Check that instruction is branch
+  FACTOR_ASSERT((insn >> 26) == 0x12);
 }
 
-static const cell b_mask = 0x3fffffc;
+static const uint32_t b_mask = 0x3fffffc;
 
-inline static void *get_call_target(cell return_address)
-{
-       return_address -= sizeof(cell);
-       check_call_site(return_address);
+inline static void* get_call_target(cell return_address) {
+  return_address -= 4;
+  check_call_site(return_address);
 
-       cell insn = *(cell *)return_address;
-       cell unsigned_addr = (insn & b_mask);
-       fixnum signed_addr = (fixnum)(unsigned_addr << 6) >> 6;
-       return (void *)(signed_addr + return_address);
+  uint32_t insn = *(uint32_t*)return_address;
+  uint32_t unsigned_addr = (insn & b_mask);
+  int32_t signed_addr = (int32_t)(unsigned_addr << 6) >> 6;
+  return (void*)(signed_addr + return_address);
 }
 
-inline static void set_call_target(cell return_address, void *target)
-{
-       return_address -= sizeof(cell);
-       check_call_site(return_address);
+inline static void set_call_target(cell return_address, cell target) {
+  return_address -= 4;
+  check_call_site(return_address);
 
-       cell insn = *(cell *)return_address;
+  uint32_t insn = *(uint32_t*)return_address;
 
-       fixnum relative_address = ((cell)target - return_address);
-       insn = ((insn & ~b_mask) | (relative_address & b_mask));
-       *(cell *)return_address = insn;
+  fixnum relative_address = target - return_address;
+  insn = ((insn & ~b_mask) | (relative_address & b_mask));
+  *(uint32_t*)return_address = insn;
 
-       /* Flush the cache line containing the call we just patched */
-       __asm__ __volatile__ ("icbi 0, %0\n" "sync\n"::"r" (return_address):);
+  // Flush the cache line containing the call we just patched
+  __asm__ __volatile__("icbi 0, %0\n"
+                       "sync\n" ::"r"(return_address)
+                       :);
 }
 
-inline static bool tail_call_site_p(cell return_address)
-{
-       return_address -= sizeof(cell);
-       cell insn = *(cell *)return_address;
-       return (insn & 0x1) == 0;
+inline static bool tail_call_site_p(cell return_address) {
+  return_address -= 4;
+  uint32_t insn = *(uint32_t*)return_address;
+  return (insn & 0x1) == 0;
 }
 
-inline static unsigned int fpu_status(unsigned int status)
-{
-        unsigned int r = 0;
-
-        if (status & 0x20000000)
-               r |= FP_TRAP_INVALID_OPERATION;
-        if (status & 0x10000000)
-               r |= FP_TRAP_OVERFLOW;
-        if (status & 0x08000000)
-               r |= FP_TRAP_UNDERFLOW;
-        if (status & 0x04000000)
-               r |= FP_TRAP_ZERO_DIVIDE;
-        if (status & 0x02000000)
-               r |= FP_TRAP_INEXACT;
-
-        return r;
+inline static unsigned int fpu_status(unsigned int status) {
+  unsigned int r = 0;
+
+  if (status & 0x20000000)
+    r |= FP_TRAP_INVALID_OPERATION;
+  if (status & 0x10000000)
+    r |= FP_TRAP_OVERFLOW;
+  if (status & 0x08000000)
+    r |= FP_TRAP_UNDERFLOW;
+  if (status & 0x04000000)
+    r |= FP_TRAP_ZERO_DIVIDE;
+  if (status & 0x02000000)
+    r |= FP_TRAP_INEXACT;
+
+  return r;
 }
 
-/* Defined in assembly */
-VM_ASM_API void c_to_factor(cell quot, void *vm);
-VM_ASM_API void throw_impl(cell quot, stack_frame *rewind, void *vm);
-VM_ASM_API void lazy_jit_compile(cell quot, void *vm);
-VM_ASM_API void flush_icache(cell start, cell len);
-
-VM_ASM_API void set_callstack(stack_frame *to,
-                              stack_frame *from,
-                              cell length,
-                              void *(*memcpy)(void*,const void*, size_t));
+// Defined in assembly
+VM_C_API void flush_icache(cell start, cell len);
 
 }