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Update some copyright headers to follow the current convention
[factor.git] / basis / compiler / cfg / intrinsics / simd / simd-tests.factor
1 ! Copyright (C) 2009 Joe Groff.
2 ! See http://factorcode.org/license.txt for BSD license.
3 USING: accessors arrays assocs biassocs byte-arrays classes
4 compiler.cfg compiler.cfg.comparisons compiler.cfg.instructions
5 compiler.cfg.intrinsics.simd compiler.cfg.intrinsics.simd.backend
6 compiler.cfg.stacks.local compiler.test compiler.tree
7 compiler.tree.propagation.info cpu.architecture fry kernel locals make
8 namespaces sequences system tools.test words ;
9 IN: compiler.cfg.intrinsics.simd.tests
10
11 :: test-node ( rep -- node )
12     T{ #call
13         { in-d  { 1 2 3 4 } }
14         { out-d { 5 } }
15         { info H{
16             { 1 T{ value-info-state { class byte-array } } }
17             { 2 T{ value-info-state { class byte-array } } }
18             { 3 T{ value-info-state { class byte-array } } }
19             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
20             { 5 T{ value-info-state { class byte-array } } }
21         } }
22     } ;
23
24 :: test-node-literal ( lit rep -- node )
25     lit class-of :> lit-class
26     T{ #call
27         { in-d  { 1 2 3 4 } }
28         { out-d { 5 } }
29         { info H{
30             { 1 T{ value-info-state { class byte-array } } }
31             { 2 T{ value-info-state { class byte-array } } }
32             { 3 T{ value-info-state { class lit-class } { literal? t } { literal lit } } }
33             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
34             { 5 T{ value-info-state { class byte-array } } }
35         } }
36     } ;
37
38 : test-node-nonliteral-rep ( -- node )
39     T{ #call
40         { in-d  { 1 2 3 4 } }
41         { out-d { 5 } }
42         { info H{
43             { 1 T{ value-info-state { class byte-array } } }
44             { 2 T{ value-info-state { class byte-array } } }
45             { 3 T{ value-info-state { class byte-array } } }
46             { 4 T{ value-info-state { class object } } }
47             { 5 T{ value-info-state { class byte-array } } }
48         } }
49     } ;
50
51 : test-compiler-env ( -- x )
52     H{ } clone
53     T{ basic-block } 0 0 0 0 height-state boa >>height
54     \ basic-block pick set-at
55
56     0 0 0 0 height-state boa \ height-state pick set-at
57     HS{ } clone \ local-peek-set pick set-at
58     H{ } clone \ replaces pick set-at
59     H{ } <biassoc> \ locs>vregs pick set-at ;
60
61 : make-classes ( quot -- seq )
62     { } make [ class-of ] map ; inline
63
64 : test-emit ( cpu rep quot -- node )
65     [
66         [ new \ cpu ] 2dip '[
67             test-compiler-env [ _ test-node @ ] with-variables
68         ] with-variable
69     ] make-classes ; inline
70
71 : test-emit-literal ( cpu lit rep quot -- node )
72     [
73         [ new \ cpu ] 3dip '[
74             test-compiler-env [ _ _ test-node-literal @ ] with-variables
75         ] with-variable
76     ] make-classes ; inline
77
78 : test-emit-nonliteral-rep ( cpu quot -- node )
79     [
80         [ new \ cpu ] dip '[
81             test-compiler-env [ test-node-nonliteral-rep @ ] with-variables
82         ] with-variable
83     ] make-classes ; inline
84
85 CONSTANT: signed-reps
86     { char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep }
87 CONSTANT: all-reps
88     {
89         char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep
90         uchar-16-rep ushort-8-rep uint-4-rep ulonglong-2-rep
91     }
92
93 TUPLE: scalar-cpu ;
94
95 TUPLE: simple-ops-cpu ;
96 M: simple-ops-cpu %zero-vector-reps all-reps ;
97 M: simple-ops-cpu %fill-vector-reps all-reps ;
98 M: simple-ops-cpu %add-vector-reps all-reps ;
99 M: simple-ops-cpu %sub-vector-reps all-reps ;
100 M: simple-ops-cpu %mul-vector-reps all-reps ;
101 M: simple-ops-cpu %div-vector-reps all-reps ;
102 M: simple-ops-cpu %andn-vector-reps all-reps ;
103 M: simple-ops-cpu %and-vector-reps all-reps ;
104 M: simple-ops-cpu %or-vector-reps all-reps ;
105 M: simple-ops-cpu %xor-vector-reps all-reps ;
106 M: simple-ops-cpu %merge-vector-reps all-reps ;
107 M: simple-ops-cpu %sqrt-vector-reps all-reps ;
108 M: simple-ops-cpu %move-vector-mask-reps  all-reps ;
109 M: simple-ops-cpu %test-vector-reps  all-reps ;
110 M: simple-ops-cpu %signed-pack-vector-reps all-reps ;
111 M: simple-ops-cpu %unsigned-pack-vector-reps all-reps ;
112 M: simple-ops-cpu %gather-vector-2-reps { longlong-2-rep ulonglong-2-rep double-2-rep } ;
113 M: simple-ops-cpu %gather-vector-4-reps { int-4-rep uint-4-rep float-4-rep } ;
114 M: simple-ops-cpu %alien-vector-reps all-reps ;
115
116 ! v+
117 { { ##add-vector } }
118 [ simple-ops-cpu float-4-rep [ emit-simd-v+ ] test-emit ]
119 unit-test
120
121 ! v-
122 { { ##sub-vector } }
123 [ simple-ops-cpu float-4-rep [ emit-simd-v- ] test-emit ]
124 unit-test
125
126 ! vneg
127 { { ##load-reference ##sub-vector } }
128 [ simple-ops-cpu float-4-rep [ emit-simd-vneg ] test-emit ]
129 unit-test
130
131 { { ##zero-vector ##sub-vector } }
132 [ simple-ops-cpu int-4-rep [ emit-simd-vneg ] test-emit ]
133 unit-test
134
135 ! v*
136 { { ##mul-vector } }
137 [ simple-ops-cpu float-4-rep [ emit-simd-v* ] test-emit ]
138 unit-test
139
140 ! v/
141 { { ##div-vector } }
142 [ simple-ops-cpu float-4-rep [ emit-simd-v/ ] test-emit ]
143 unit-test
144
145 TUPLE: addsub-cpu < simple-ops-cpu ;
146 M: addsub-cpu %add-sub-vector-reps { int-4-rep float-4-rep } ;
147
148 ! v+-
149 { { ##add-sub-vector } }
150 [ addsub-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
151 unit-test
152
153 { { ##load-reference ##xor-vector ##add-vector } }
154 [ simple-ops-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
155 unit-test
156
157 { { ##load-reference ##xor-vector ##sub-vector ##add-vector } }
158 [ simple-ops-cpu int-4-rep [ emit-simd-v+- ] test-emit ]
159 unit-test
160
161 TUPLE: saturating-cpu < simple-ops-cpu ;
162 M: saturating-cpu %saturated-add-vector-reps { int-4-rep } ;
163 M: saturating-cpu %saturated-sub-vector-reps { int-4-rep } ;
164 M: saturating-cpu %saturated-mul-vector-reps { int-4-rep } ;
165
166 ! vs+
167 { { ##add-vector } }
168 [ simple-ops-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
169 unit-test
170
171 { { ##add-vector } }
172 [ saturating-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
173 unit-test
174
175 { { ##saturated-add-vector } }
176 [ saturating-cpu int-4-rep [ emit-simd-vs+ ] test-emit ]
177 unit-test
178
179 ! vs-
180 { { ##sub-vector } }
181 [ simple-ops-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
182 unit-test
183
184 { { ##sub-vector } }
185 [ saturating-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
186 unit-test
187
188 { { ##saturated-sub-vector } }
189 [ saturating-cpu int-4-rep [ emit-simd-vs- ] test-emit ]
190 unit-test
191
192 ! vs*
193 { { ##mul-vector } }
194 [ simple-ops-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
195 unit-test
196
197 { { ##mul-vector } }
198 [ saturating-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
199 unit-test
200
201 { { ##saturated-mul-vector } }
202 [ saturating-cpu int-4-rep [ emit-simd-vs* ] test-emit ]
203 unit-test
204
205 TUPLE: minmax-cpu < simple-ops-cpu ;
206 M: minmax-cpu %min-vector-reps signed-reps ;
207 M: minmax-cpu %max-vector-reps signed-reps ;
208 M: minmax-cpu %compare-vector-reps { cc= cc/= } member? [ signed-reps ] [ { } ] if ;
209 M: minmax-cpu %compare-vector-ccs nip f 2array 1array f ;
210
211 TUPLE: compare-cpu < simple-ops-cpu ;
212 M: compare-cpu %compare-vector-reps drop signed-reps ;
213 M: compare-cpu %compare-vector-ccs nip f 2array 1array f ;
214
215 ! vmin
216 { { ##min-vector } }
217 [ minmax-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
218 unit-test
219
220 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
221 [ compare-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
222 unit-test
223
224 ! vmax
225 { { ##max-vector } }
226 [ minmax-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
227 unit-test
228
229 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
230 [ compare-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
231 unit-test
232
233 TUPLE: dot-cpu < simple-ops-cpu ;
234 M: dot-cpu %dot-vector-reps { float-4-rep } ;
235
236 TUPLE: horizontal-cpu < simple-ops-cpu ;
237 M: horizontal-cpu %horizontal-add-vector-reps signed-reps ;
238 M: horizontal-cpu %unpack-vector-head-reps signed-reps ;
239 M: horizontal-cpu %unpack-vector-tail-reps signed-reps ;
240
241 ! v.
242 { { ##dot-vector } }
243 [ dot-cpu float-4-rep [ emit-simd-v. ] test-emit ]
244 unit-test
245
246 { { ##mul-vector ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
247 [ horizontal-cpu float-4-rep [ emit-simd-v. ] test-emit ]
248 unit-test
249
250 { {
251     ##mul-vector
252     ##merge-vector-head ##merge-vector-tail ##add-vector
253     ##merge-vector-head ##merge-vector-tail ##add-vector
254     ##vector>scalar
255 } }
256 [ simple-ops-cpu float-4-rep [ emit-simd-v. ] test-emit ]
257 unit-test
258
259 ! vsqrt
260 { { ##sqrt-vector } }
261 [ simple-ops-cpu float-4-rep [ emit-simd-vsqrt ] test-emit ]
262 unit-test
263
264 ! sum
265 { { ##horizontal-add-vector ##vector>scalar } }
266 [ horizontal-cpu double-2-rep [ emit-simd-sum ] test-emit ]
267 unit-test
268
269 { { ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
270 [ horizontal-cpu float-4-rep [ emit-simd-sum ] test-emit ]
271 unit-test
272
273 { {
274     ##unpack-vector-head ##unpack-vector-tail ##add-vector
275     ##horizontal-add-vector ##horizontal-add-vector
276     ##vector>scalar
277 } }
278 [ horizontal-cpu short-8-rep [ emit-simd-sum ] test-emit ]
279 unit-test
280
281 { {
282     ##unpack-vector-head ##unpack-vector-tail ##add-vector
283     ##horizontal-add-vector ##horizontal-add-vector ##horizontal-add-vector
284     ##vector>scalar
285 } }
286 [ horizontal-cpu char-16-rep [ emit-simd-sum ] test-emit ]
287 unit-test
288
289 TUPLE: abs-cpu < simple-ops-cpu ;
290 M: abs-cpu %abs-vector-reps signed-reps ;
291
292 ! vabs
293 { { } }
294 [ simple-ops-cpu uint-4-rep [ emit-simd-vabs ] test-emit ]
295 unit-test
296
297 { { ##abs-vector } }
298 [ abs-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
299 unit-test
300
301 { { ##load-reference ##andn-vector } }
302 [ simple-ops-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
303 unit-test
304
305 { { ##zero-vector ##sub-vector ##compare-vector ##and-vector ##andn-vector ##or-vector } }
306 [ compare-cpu int-4-rep [ emit-simd-vabs ] test-emit ]
307 unit-test
308
309 ! vand
310 { { ##and-vector } }
311 [ simple-ops-cpu float-4-rep [ emit-simd-vand ] test-emit ]
312 unit-test
313
314 ! vandn
315 { { ##andn-vector } }
316 [ simple-ops-cpu float-4-rep [ emit-simd-vandn ] test-emit ]
317 unit-test
318
319 ! vor
320 { { ##or-vector } }
321 [ simple-ops-cpu float-4-rep [ emit-simd-vor ] test-emit ]
322 unit-test
323
324 ! vxor
325 { { ##xor-vector } }
326 [ simple-ops-cpu float-4-rep [ emit-simd-vxor ] test-emit ]
327 unit-test
328
329 TUPLE: not-cpu < simple-ops-cpu ;
330 M: not-cpu %not-vector-reps signed-reps ;
331
332 ! vnot
333 { { ##not-vector } }
334 [ not-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
335 unit-test
336
337 { { ##fill-vector ##xor-vector } }
338 [ simple-ops-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
339 unit-test
340
341 TUPLE: shift-cpu < simple-ops-cpu ;
342 M: shift-cpu %shl-vector-reps signed-reps ;
343 M: shift-cpu %shr-vector-reps signed-reps ;
344
345 TUPLE: shift-imm-cpu < simple-ops-cpu ;
346 M: shift-imm-cpu %shl-vector-imm-reps signed-reps ;
347 M: shift-imm-cpu %shr-vector-imm-reps signed-reps ;
348
349 TUPLE: horizontal-shift-cpu < simple-ops-cpu ;
350 M: horizontal-shift-cpu %horizontal-shl-vector-imm-reps signed-reps ;
351 M: horizontal-shift-cpu %horizontal-shr-vector-imm-reps signed-reps ;
352
353 ! vlshift
354 { { ##shl-vector-imm } }
355 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vlshift ] test-emit-literal ]
356 unit-test
357
358 { { ##shl-vector } }
359 [ shift-cpu int-4-rep [ emit-simd-vlshift ] test-emit ]
360 unit-test
361
362 ! vrshift
363 { { ##shr-vector-imm } }
364 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vrshift ] test-emit-literal ]
365 unit-test
366
367 { { ##shr-vector } }
368 [ shift-cpu int-4-rep [ emit-simd-vrshift ] test-emit ]
369 unit-test
370
371 ! hlshift
372 { { ##horizontal-shl-vector-imm } }
373 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hlshift ] test-emit-literal ]
374 unit-test
375
376 ! hrshift
377 { { ##horizontal-shr-vector-imm } }
378 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hrshift ] test-emit-literal ]
379 unit-test
380
381 TUPLE: shuffle-imm-cpu < simple-ops-cpu ;
382 M: shuffle-imm-cpu %shuffle-vector-imm-reps signed-reps ;
383
384 TUPLE: shuffle-cpu < simple-ops-cpu ;
385 M: shuffle-cpu %shuffle-vector-reps signed-reps ;
386
387 ! vshuffle-elements
388 { { ##load-reference ##shuffle-vector } }
389 [ shuffle-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
390 unit-test
391
392 { { ##shuffle-vector-imm } }
393 [ shuffle-imm-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
394 unit-test
395
396 ! vshuffle-bytes
397 { { ##shuffle-vector } }
398 [ shuffle-cpu int-4-rep [ emit-simd-vshuffle-bytes ] test-emit ]
399 unit-test
400
401 ! vmerge-head
402 { { ##merge-vector-head } }
403 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-head ] test-emit ]
404 unit-test
405
406 ! vmerge-tail
407 { { ##merge-vector-tail } }
408 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-tail ] test-emit ]
409 unit-test
410
411 ! v<= etc.
412 { { ##compare-vector } }
413 [ compare-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
414 unit-test
415
416 { { ##min-vector ##compare-vector } }
417 [ minmax-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
418 unit-test
419
420 { { ##load-reference ##xor-vector ##xor-vector ##compare-vector } }
421 [ compare-cpu uint-4-rep [ emit-simd-v<= ] test-emit ]
422 unit-test
423
424 ! vany? etc.
425 { { ##test-vector } }
426 [ simple-ops-cpu int-4-rep [ emit-simd-vany? ] test-emit ]
427 unit-test
428
429 TUPLE: convert-cpu < simple-ops-cpu ;
430 M: convert-cpu %integer>float-vector-reps { int-4-rep } ;
431 M: convert-cpu %float>integer-vector-reps { float-4-rep } ;
432
433 ! v>float
434 { { } }
435 [ convert-cpu float-4-rep [ emit-simd-v>float ] test-emit ]
436 unit-test
437
438 { { ##integer>float-vector } }
439 [ convert-cpu int-4-rep [ emit-simd-v>float ] test-emit ]
440 unit-test
441
442 ! v>integer
443 { { } }
444 [ convert-cpu int-4-rep [ emit-simd-v>integer ] test-emit ]
445 unit-test
446
447 { { ##float>integer-vector } }
448 [ convert-cpu float-4-rep [ emit-simd-v>integer ] test-emit ]
449 unit-test
450
451 ! vpack-signed
452 { { ##signed-pack-vector } }
453 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-signed ] test-emit ]
454 unit-test
455
456 ! vpack-unsigned
457 { { ##unsigned-pack-vector } }
458 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-unsigned ] test-emit ]
459 unit-test
460
461 TUPLE: unpack-head-cpu < simple-ops-cpu ;
462 M: unpack-head-cpu %unpack-vector-head-reps all-reps ;
463 TUPLE: unpack-cpu < unpack-head-cpu ;
464 M: unpack-cpu %unpack-vector-tail-reps all-reps ;
465
466 ! vunpack-head
467 { { ##unpack-vector-head } }
468 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
469 unit-test
470
471 { { ##zero-vector ##merge-vector-head } }
472 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-head ] test-emit ]
473 unit-test
474
475 { { ##merge-vector-head ##shr-vector-imm } }
476 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
477 unit-test
478
479 { { ##zero-vector ##compare-vector ##merge-vector-head } }
480 [ compare-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
481 unit-test
482
483 ! vunpack-tail
484 { { ##unpack-vector-tail } }
485 [ unpack-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
486 unit-test
487
488 { { ##tail>head-vector ##unpack-vector-head } }
489 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
490 unit-test
491
492 { { ##zero-vector ##merge-vector-tail } }
493 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-tail ] test-emit ]
494 unit-test
495
496 { { ##merge-vector-tail ##shr-vector-imm } }
497 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
498 unit-test
499
500 { { ##zero-vector ##compare-vector ##merge-vector-tail } }
501 [ compare-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
502 unit-test
503
504 ! with
505 { { ##scalar>vector ##shuffle-vector-imm } }
506 [ shuffle-imm-cpu float-4-rep [ emit-simd-with ] test-emit ]
507 unit-test
508
509 ! gather-2
510 { { ##gather-vector-2 } }
511 [ simple-ops-cpu double-2-rep [ emit-simd-gather-2 ] test-emit ]
512 unit-test
513
514 ! gather-4
515 { { ##gather-vector-4 } }
516 [ simple-ops-cpu float-4-rep [ emit-simd-gather-4 ] test-emit ]
517 unit-test
518
519 ! select
520 { { ##shuffle-vector-imm ##vector>scalar } }
521 [ shuffle-imm-cpu 1 float-4-rep [ emit-simd-select ] test-emit-literal ]
522 unit-test
523
524 ! ^load-neg-zero-vector
525 {
526     V{
527         T{ ##load-reference
528            { dst 1 }
529            { obj B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 } }
530         }
531         T{ ##load-reference
532            { dst 2 }
533            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 } }
534         }
535     }
536 } [
537     [
538         { float-4-rep double-2-rep } [ ^load-neg-zero-vector drop ] each
539     ] V{ } make
540 ] cfg-unit-test
541
542 ! ^load-add-sub-vector
543 {
544     V{
545         T{ ##load-reference
546            { dst 1 }
547            { obj B{ 0 0 0 128 0 0 0 0 0 0 0 128 0 0 0 0 } }
548         }
549         T{ ##load-reference
550            { dst 2 }
551            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 0 } }
552         }
553         T{ ##load-reference
554            { dst 3 }
555            { obj
556              B{ 255 0 255 0 255 0 255 0 255 0 255 0 255 0 255 0 }
557            }
558         }
559         T{ ##load-reference
560            { dst 4 }
561            { obj
562              B{ 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 }
563            }
564         }
565         T{ ##load-reference
566            { dst 5 }
567            { obj
568              B{ 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 }
569            }
570         }
571         T{ ##load-reference
572            { dst 6 }
573            { obj
574              B{ 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 }
575            }
576         }
577     }
578 } [
579     [
580         {
581             float-4-rep
582             double-2-rep
583             char-16-rep
584             short-8-rep
585             int-4-rep
586             longlong-2-rep
587         } [ ^load-add-sub-vector drop ] each
588     ] V{ } make
589 ] cfg-unit-test
590
591 ! ^load-half-vector
592 {
593     V{
594         T{ ##load-reference
595            { dst 1 }
596            { obj B{ 0 0 0 63 0 0 0 63 0 0 0 63 0 0 0 63 } }
597         }
598         T{ ##load-reference
599            { dst 2 }
600            { obj B{ 0 0 0 0 0 0 224 63 0 0 0 0 0 0 224 63 } }
601         }
602     }
603 } [
604     [
605         { float-4-rep double-2-rep } [ ^load-half-vector drop ] each
606     ] V{ } make
607 ] cfg-unit-test
608
609 ! sign-bit-mask
610 {
611     {
612         B{ 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 }
613         B{ 0 128 0 128 0 128 0 128 0 128 0 128 0 128 0 128 }
614         B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 }
615         B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 }
616     }
617 } [
618     { char-16-rep short-8-rep int-4-rep longlong-2-rep } [ sign-bit-mask ] map
619 ] unit-test
620
621
622 ! test with nonliteral/invalid reps
623 [ simple-ops-cpu [ emit-simd-v+ ] test-emit-nonliteral-rep ]
624 [ bad-simd-intrinsic? ] must-fail-with
625
626 [ simple-ops-cpu f [ emit-simd-v+ ] test-emit ]
627 [ bad-simd-intrinsic? ] must-fail-with
628
629 [ simple-ops-cpu 3 [ emit-simd-v+ ] test-emit ]
630 [ bad-simd-intrinsic? ] must-fail-with