basis/compiler/cfg/intrinsics/simd/simd-tests.factor

   1 ! (c)2009 Joe Groff bsd license
   2 USING: accessors arrays assocs biassocs byte-arrays classes
   3 compiler.cfg compiler.cfg.comparisons compiler.cfg.instructions
   4 compiler.cfg.intrinsics.simd compiler.cfg.intrinsics.simd.backend
   5 compiler.cfg.stacks.local compiler.test compiler.tree
   6 compiler.tree.propagation.info cpu.architecture fry kernel locals make
   7 namespaces sequences system tools.test words ;
   8 IN: compiler.cfg.intrinsics.simd.tests
   9
  10 :: test-node ( rep -- node )
  11     T{ #call
  12         { in-d  { 1 2 3 4 } }
  13         { out-d { 5 } }
  14         { info H{
  15             { 1 T{ value-info-state { class byte-array } } }
  16             { 2 T{ value-info-state { class byte-array } } }
  17             { 3 T{ value-info-state { class byte-array } } }
  18             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
  19             { 5 T{ value-info-state { class byte-array } } }
  20         } }
  21     } ;
  22
  23 :: test-node-literal ( lit rep -- node )
  24     lit class-of :> lit-class
  25     T{ #call
  26         { in-d  { 1 2 3 4 } }
  27         { out-d { 5 } }
  28         { info H{
  29             { 1 T{ value-info-state { class byte-array } } }
  30             { 2 T{ value-info-state { class byte-array } } }
  31             { 3 T{ value-info-state { class lit-class } { literal? t } { literal lit } } }
  32             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
  33             { 5 T{ value-info-state { class byte-array } } }
  34         } }
  35     } ;
  36
  37 : test-node-nonliteral-rep ( -- node )
  38     T{ #call
  39         { in-d  { 1 2 3 4 } }
  40         { out-d { 5 } }
  41         { info H{
  42             { 1 T{ value-info-state { class byte-array } } }
  43             { 2 T{ value-info-state { class byte-array } } }
  44             { 3 T{ value-info-state { class byte-array } } }
  45             { 4 T{ value-info-state { class object } } }
  46             { 5 T{ value-info-state { class byte-array } } }
  47         } }
  48     } ;
  49
  50 : test-compiler-env ( -- x )
  51     H{ } clone
  52     T{ basic-block } 0 0 0 0 height-state boa >>height
  53     \ basic-block pick set-at
  54
  55     0 0 0 0 height-state boa \ height-state pick set-at
  56     HS{ } clone \ local-peek-set pick set-at
  57     H{ } clone \ replaces pick set-at
  58     H{ } <biassoc> \ locs>vregs pick set-at ;
  59
  60 : make-classes ( quot -- seq )
  61     { } make [ class-of ] map ; inline
  62
  63 : test-emit ( cpu rep quot -- node )
  64     [
  65         [ new \ cpu ] 2dip '[
  66             test-compiler-env [ _ test-node @ ] with-variables
  67         ] with-variable
  68     ] make-classes ; inline
  69
  70 : test-emit-literal ( cpu lit rep quot -- node )
  71     [
  72         [ new \ cpu ] 3dip '[
  73             test-compiler-env [ _ _ test-node-literal @ ] with-variables
  74         ] with-variable
  75     ] make-classes ; inline
  76
  77 : test-emit-nonliteral-rep ( cpu quot -- node )
  78     [
  79         [ new \ cpu ] dip '[
  80             test-compiler-env [ test-node-nonliteral-rep @ ] with-variables
  81         ] with-variable
  82     ] make-classes ; inline
  83
  84 CONSTANT: signed-reps
  85     { char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep }
  86 CONSTANT: all-reps
  87     {
  88         char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep
  89         uchar-16-rep ushort-8-rep uint-4-rep ulonglong-2-rep
  90     }
  91
  92 TUPLE: scalar-cpu ;
  93
  94 TUPLE: simple-ops-cpu ;
  95 M: simple-ops-cpu %zero-vector-reps all-reps ;
  96 M: simple-ops-cpu %fill-vector-reps all-reps ;
  97 M: simple-ops-cpu %add-vector-reps all-reps ;
  98 M: simple-ops-cpu %sub-vector-reps all-reps ;
  99 M: simple-ops-cpu %mul-vector-reps all-reps ;
 100 M: simple-ops-cpu %div-vector-reps all-reps ;
 101 M: simple-ops-cpu %andn-vector-reps all-reps ;
 102 M: simple-ops-cpu %and-vector-reps all-reps ;
 103 M: simple-ops-cpu %or-vector-reps all-reps ;
 104 M: simple-ops-cpu %xor-vector-reps all-reps ;
 105 M: simple-ops-cpu %merge-vector-reps all-reps ;
 106 M: simple-ops-cpu %sqrt-vector-reps all-reps ;
 107 M: simple-ops-cpu %move-vector-mask-reps  all-reps ;
 108 M: simple-ops-cpu %test-vector-reps  all-reps ;
 109 M: simple-ops-cpu %signed-pack-vector-reps all-reps ;
 110 M: simple-ops-cpu %unsigned-pack-vector-reps all-reps ;
 111 M: simple-ops-cpu %gather-vector-2-reps { longlong-2-rep ulonglong-2-rep double-2-rep } ;
 112 M: simple-ops-cpu %gather-vector-4-reps { int-4-rep uint-4-rep float-4-rep } ;
 113 M: simple-ops-cpu %alien-vector-reps all-reps ;
 114
 115 ! v+
 116 { { ##add-vector } }
 117 [ simple-ops-cpu float-4-rep [ emit-simd-v+ ] test-emit ]
 118 unit-test
 119
 120 ! v-
 121 { { ##sub-vector } }
 122 [ simple-ops-cpu float-4-rep [ emit-simd-v- ] test-emit ]
 123 unit-test
 124
 125 ! vneg
 126 { { ##load-reference ##sub-vector } }
 127 [ simple-ops-cpu float-4-rep [ emit-simd-vneg ] test-emit ]
 128 unit-test
 129
 130 { { ##zero-vector ##sub-vector } }
 131 [ simple-ops-cpu int-4-rep [ emit-simd-vneg ] test-emit ]
 132 unit-test
 133
 134 ! v*
 135 { { ##mul-vector } }
 136 [ simple-ops-cpu float-4-rep [ emit-simd-v* ] test-emit ]
 137 unit-test
 138
 139 ! v/
 140 { { ##div-vector } }
 141 [ simple-ops-cpu float-4-rep [ emit-simd-v/ ] test-emit ]
 142 unit-test
 143
 144 TUPLE: addsub-cpu < simple-ops-cpu ;
 145 M: addsub-cpu %add-sub-vector-reps { int-4-rep float-4-rep } ;
 146
 147 ! v+-
 148 { { ##add-sub-vector } }
 149 [ addsub-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
 150 unit-test
 151
 152 { { ##load-reference ##xor-vector ##add-vector } }
 153 [ simple-ops-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
 154 unit-test
 155
 156 { { ##load-reference ##xor-vector ##sub-vector ##add-vector } }
 157 [ simple-ops-cpu int-4-rep [ emit-simd-v+- ] test-emit ]
 158 unit-test
 159
 160 TUPLE: saturating-cpu < simple-ops-cpu ;
 161 M: saturating-cpu %saturated-add-vector-reps { int-4-rep } ;
 162 M: saturating-cpu %saturated-sub-vector-reps { int-4-rep } ;
 163 M: saturating-cpu %saturated-mul-vector-reps { int-4-rep } ;
 164
 165 ! vs+
 166 { { ##add-vector } }
 167 [ simple-ops-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
 168 unit-test
 169
 170 { { ##add-vector } }
 171 [ saturating-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
 172 unit-test
 173
 174 { { ##saturated-add-vector } }
 175 [ saturating-cpu int-4-rep [ emit-simd-vs+ ] test-emit ]
 176 unit-test
 177
 178 ! vs-
 179 { { ##sub-vector } }
 180 [ simple-ops-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
 181 unit-test
 182
 183 { { ##sub-vector } }
 184 [ saturating-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
 185 unit-test
 186
 187 { { ##saturated-sub-vector } }
 188 [ saturating-cpu int-4-rep [ emit-simd-vs- ] test-emit ]
 189 unit-test
 190
 191 ! vs*
 192 { { ##mul-vector } }
 193 [ simple-ops-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
 194 unit-test
 195
 196 { { ##mul-vector } }
 197 [ saturating-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
 198 unit-test
 199
 200 { { ##saturated-mul-vector } }
 201 [ saturating-cpu int-4-rep [ emit-simd-vs* ] test-emit ]
 202 unit-test
 203
 204 TUPLE: minmax-cpu < simple-ops-cpu ;
 205 M: minmax-cpu %min-vector-reps signed-reps ;
 206 M: minmax-cpu %max-vector-reps signed-reps ;
 207 M: minmax-cpu %compare-vector-reps { cc= cc/= } member? [ signed-reps ] [ { } ] if ;
 208 M: minmax-cpu %compare-vector-ccs nip f 2array 1array f ;
 209
 210 TUPLE: compare-cpu < simple-ops-cpu ;
 211 M: compare-cpu %compare-vector-reps drop signed-reps ;
 212 M: compare-cpu %compare-vector-ccs nip f 2array 1array f ;
 213
 214 ! vmin
 215 { { ##min-vector } }
 216 [ minmax-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
 217 unit-test
 218
 219 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 220 [ compare-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
 221 unit-test
 222
 223 ! vmax
 224 { { ##max-vector } }
 225 [ minmax-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
 226 unit-test
 227
 228 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 229 [ compare-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
 230 unit-test
 231
 232 TUPLE: dot-cpu < simple-ops-cpu ;
 233 M: dot-cpu %dot-vector-reps { float-4-rep } ;
 234
 235 TUPLE: horizontal-cpu < simple-ops-cpu ;
 236 M: horizontal-cpu %horizontal-add-vector-reps signed-reps ;
 237 M: horizontal-cpu %unpack-vector-head-reps signed-reps ;
 238 M: horizontal-cpu %unpack-vector-tail-reps signed-reps ;
 239
 240 ! v.
 241 { { ##dot-vector } }
 242 [ dot-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 243 unit-test
 244
 245 { { ##mul-vector ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
 246 [ horizontal-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 247 unit-test
 248
 249 { {
 250     ##mul-vector
 251     ##merge-vector-head ##merge-vector-tail ##add-vector
 252     ##merge-vector-head ##merge-vector-tail ##add-vector
 253     ##vector>scalar
 254 } }
 255 [ simple-ops-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 256 unit-test
 257
 258 ! vsqrt
 259 { { ##sqrt-vector } }
 260 [ simple-ops-cpu float-4-rep [ emit-simd-vsqrt ] test-emit ]
 261 unit-test
 262
 263 ! sum
 264 { { ##horizontal-add-vector ##vector>scalar } }
 265 [ horizontal-cpu double-2-rep [ emit-simd-sum ] test-emit ]
 266 unit-test
 267
 268 { { ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
 269 [ horizontal-cpu float-4-rep [ emit-simd-sum ] test-emit ]
 270 unit-test
 271
 272 { {
 273     ##unpack-vector-head ##unpack-vector-tail ##add-vector
 274     ##horizontal-add-vector ##horizontal-add-vector
 275     ##vector>scalar
 276 } }
 277 [ horizontal-cpu short-8-rep [ emit-simd-sum ] test-emit ]
 278 unit-test
 279
 280 { {
 281     ##unpack-vector-head ##unpack-vector-tail ##add-vector
 282     ##horizontal-add-vector ##horizontal-add-vector ##horizontal-add-vector
 283     ##vector>scalar
 284 } }
 285 [ horizontal-cpu char-16-rep [ emit-simd-sum ] test-emit ]
 286 unit-test
 287
 288 TUPLE: abs-cpu < simple-ops-cpu ;
 289 M: abs-cpu %abs-vector-reps signed-reps ;
 290
 291 ! vabs
 292 { { } }
 293 [ simple-ops-cpu uint-4-rep [ emit-simd-vabs ] test-emit ]
 294 unit-test
 295
 296 { { ##abs-vector } }
 297 [ abs-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
 298 unit-test
 299
 300 { { ##load-reference ##andn-vector } }
 301 [ simple-ops-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
 302 unit-test
 303
 304 { { ##zero-vector ##sub-vector ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 305 [ compare-cpu int-4-rep [ emit-simd-vabs ] test-emit ]
 306 unit-test
 307
 308 ! vand
 309 { { ##and-vector } }
 310 [ simple-ops-cpu float-4-rep [ emit-simd-vand ] test-emit ]
 311 unit-test
 312
 313 ! vandn
 314 { { ##andn-vector } }
 315 [ simple-ops-cpu float-4-rep [ emit-simd-vandn ] test-emit ]
 316 unit-test
 317
 318 ! vor
 319 { { ##or-vector } }
 320 [ simple-ops-cpu float-4-rep [ emit-simd-vor ] test-emit ]
 321 unit-test
 322
 323 ! vxor
 324 { { ##xor-vector } }
 325 [ simple-ops-cpu float-4-rep [ emit-simd-vxor ] test-emit ]
 326 unit-test
 327
 328 TUPLE: not-cpu < simple-ops-cpu ;
 329 M: not-cpu %not-vector-reps signed-reps ;
 330
 331 ! vnot
 332 { { ##not-vector } }
 333 [ not-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
 334 unit-test
 335
 336 { { ##fill-vector ##xor-vector } }
 337 [ simple-ops-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
 338 unit-test
 339
 340 TUPLE: shift-cpu < simple-ops-cpu ;
 341 M: shift-cpu %shl-vector-reps signed-reps ;
 342 M: shift-cpu %shr-vector-reps signed-reps ;
 343
 344 TUPLE: shift-imm-cpu < simple-ops-cpu ;
 345 M: shift-imm-cpu %shl-vector-imm-reps signed-reps ;
 346 M: shift-imm-cpu %shr-vector-imm-reps signed-reps ;
 347
 348 TUPLE: horizontal-shift-cpu < simple-ops-cpu ;
 349 M: horizontal-shift-cpu %horizontal-shl-vector-imm-reps signed-reps ;
 350 M: horizontal-shift-cpu %horizontal-shr-vector-imm-reps signed-reps ;
 351
 352 ! vlshift
 353 { { ##shl-vector-imm } }
 354 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vlshift ] test-emit-literal ]
 355 unit-test
 356
 357 { { ##shl-vector } }
 358 [ shift-cpu int-4-rep [ emit-simd-vlshift ] test-emit ]
 359 unit-test
 360
 361 ! vrshift
 362 { { ##shr-vector-imm } }
 363 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vrshift ] test-emit-literal ]
 364 unit-test
 365
 366 { { ##shr-vector } }
 367 [ shift-cpu int-4-rep [ emit-simd-vrshift ] test-emit ]
 368 unit-test
 369
 370 ! hlshift
 371 { { ##horizontal-shl-vector-imm } }
 372 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hlshift ] test-emit-literal ]
 373 unit-test
 374
 375 ! hrshift
 376 { { ##horizontal-shr-vector-imm } }
 377 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hrshift ] test-emit-literal ]
 378 unit-test
 379
 380 TUPLE: shuffle-imm-cpu < simple-ops-cpu ;
 381 M: shuffle-imm-cpu %shuffle-vector-imm-reps signed-reps ;
 382
 383 TUPLE: shuffle-cpu < simple-ops-cpu ;
 384 M: shuffle-cpu %shuffle-vector-reps signed-reps ;
 385
 386 ! vshuffle-elements
 387 { { ##load-reference ##shuffle-vector } }
 388 [ shuffle-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
 389 unit-test
 390
 391 { { ##shuffle-vector-imm } }
 392 [ shuffle-imm-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
 393 unit-test
 394
 395 ! vshuffle-bytes
 396 { { ##shuffle-vector } }
 397 [ shuffle-cpu int-4-rep [ emit-simd-vshuffle-bytes ] test-emit ]
 398 unit-test
 399
 400 ! vmerge-head
 401 { { ##merge-vector-head } }
 402 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-head ] test-emit ]
 403 unit-test
 404
 405 ! vmerge-tail
 406 { { ##merge-vector-tail } }
 407 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-tail ] test-emit ]
 408 unit-test
 409
 410 ! v<= etc.
 411 { { ##compare-vector } }
 412 [ compare-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
 413 unit-test
 414
 415 { { ##min-vector ##compare-vector } }
 416 [ minmax-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
 417 unit-test
 418
 419 { { ##load-reference ##xor-vector ##xor-vector ##compare-vector } }
 420 [ compare-cpu uint-4-rep [ emit-simd-v<= ] test-emit ]
 421 unit-test
 422
 423 ! vany? etc.
 424 { { ##test-vector } }
 425 [ simple-ops-cpu int-4-rep [ emit-simd-vany? ] test-emit ]
 426 unit-test
 427
 428 TUPLE: convert-cpu < simple-ops-cpu ;
 429 M: convert-cpu %integer>float-vector-reps { int-4-rep } ;
 430 M: convert-cpu %float>integer-vector-reps { float-4-rep } ;
 431
 432 ! v>float
 433 { { } }
 434 [ convert-cpu float-4-rep [ emit-simd-v>float ] test-emit ]
 435 unit-test
 436
 437 { { ##integer>float-vector } }
 438 [ convert-cpu int-4-rep [ emit-simd-v>float ] test-emit ]
 439 unit-test
 440
 441 ! v>integer
 442 { { } }
 443 [ convert-cpu int-4-rep [ emit-simd-v>integer ] test-emit ]
 444 unit-test
 445
 446 { { ##float>integer-vector } }
 447 [ convert-cpu float-4-rep [ emit-simd-v>integer ] test-emit ]
 448 unit-test
 449
 450 ! vpack-signed
 451 { { ##signed-pack-vector } }
 452 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-signed ] test-emit ]
 453 unit-test
 454
 455 ! vpack-unsigned
 456 { { ##unsigned-pack-vector } }
 457 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-unsigned ] test-emit ]
 458 unit-test
 459
 460 TUPLE: unpack-head-cpu < simple-ops-cpu ;
 461 M: unpack-head-cpu %unpack-vector-head-reps all-reps ;
 462 TUPLE: unpack-cpu < unpack-head-cpu ;
 463 M: unpack-cpu %unpack-vector-tail-reps all-reps ;
 464
 465 ! vunpack-head
 466 { { ##unpack-vector-head } }
 467 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 468 unit-test
 469
 470 { { ##zero-vector ##merge-vector-head } }
 471 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-head ] test-emit ]
 472 unit-test
 473
 474 { { ##merge-vector-head ##shr-vector-imm } }
 475 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 476 unit-test
 477
 478 { { ##zero-vector ##compare-vector ##merge-vector-head } }
 479 [ compare-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 480 unit-test
 481
 482 ! vunpack-tail
 483 { { ##unpack-vector-tail } }
 484 [ unpack-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 485 unit-test
 486
 487 { { ##tail>head-vector ##unpack-vector-head } }
 488 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 489 unit-test
 490
 491 { { ##zero-vector ##merge-vector-tail } }
 492 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 493 unit-test
 494
 495 { { ##merge-vector-tail ##shr-vector-imm } }
 496 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 497 unit-test
 498
 499 { { ##zero-vector ##compare-vector ##merge-vector-tail } }
 500 [ compare-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 501 unit-test
 502
 503 ! with
 504 { { ##scalar>vector ##shuffle-vector-imm } }
 505 [ shuffle-imm-cpu float-4-rep [ emit-simd-with ] test-emit ]
 506 unit-test
 507
 508 ! gather-2
 509 { { ##gather-vector-2 } }
 510 [ simple-ops-cpu double-2-rep [ emit-simd-gather-2 ] test-emit ]
 511 unit-test
 512
 513 ! gather-4
 514 { { ##gather-vector-4 } }
 515 [ simple-ops-cpu float-4-rep [ emit-simd-gather-4 ] test-emit ]
 516 unit-test
 517
 518 ! select
 519 { { ##shuffle-vector-imm ##vector>scalar } }
 520 [ shuffle-imm-cpu 1 float-4-rep [ emit-simd-select ] test-emit-literal ]
 521 unit-test
 522
 523 ! ^load-neg-zero-vector
 524 {
 525     V{
 526         T{ ##load-reference
 527            { dst 1 }
 528            { obj B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 } }
 529         }
 530         T{ ##load-reference
 531            { dst 2 }
 532            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 } }
 533         }
 534     }
 535 } [
 536     [
 537         { float-4-rep double-2-rep } [ ^load-neg-zero-vector drop ] each
 538     ] V{ } make
 539 ] cfg-unit-test
 540
 541 ! ^load-add-sub-vector
 542 {
 543     V{
 544         T{ ##load-reference
 545            { dst 1 }
 546            { obj B{ 0 0 0 128 0 0 0 0 0 0 0 128 0 0 0 0 } }
 547         }
 548         T{ ##load-reference
 549            { dst 2 }
 550            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 0 } }
 551         }
 552         T{ ##load-reference
 553            { dst 3 }
 554            { obj
 555              B{ 255 0 255 0 255 0 255 0 255 0 255 0 255 0 255 0 }
 556            }
 557         }
 558         T{ ##load-reference
 559            { dst 4 }
 560            { obj
 561              B{ 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 }
 562            }
 563         }
 564         T{ ##load-reference
 565            { dst 5 }
 566            { obj
 567              B{ 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 }
 568            }
 569         }
 570         T{ ##load-reference
 571            { dst 6 }
 572            { obj
 573              B{ 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 }
 574            }
 575         }
 576     }
 577 } [
 578     [
 579         {
 580             float-4-rep
 581             double-2-rep
 582             char-16-rep
 583             short-8-rep
 584             int-4-rep
 585             longlong-2-rep
 586         } [ ^load-add-sub-vector drop ] each
 587     ] V{ } make
 588 ] cfg-unit-test
 589
 590 ! ^load-half-vector
 591 {
 592     V{
 593         T{ ##load-reference
 594            { dst 1 }
 595            { obj B{ 0 0 0 63 0 0 0 63 0 0 0 63 0 0 0 63 } }
 596         }
 597         T{ ##load-reference
 598            { dst 2 }
 599            { obj B{ 0 0 0 0 0 0 224 63 0 0 0 0 0 0 224 63 } }
 600         }
 601     }
 602 } [
 603     [
 604         { float-4-rep double-2-rep } [ ^load-half-vector drop ] each
 605     ] V{ } make
 606 ] cfg-unit-test
 607
 608 ! sign-bit-mask
 609 {
 610     {
 611         B{ 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 }
 612         B{ 0 128 0 128 0 128 0 128 0 128 0 128 0 128 0 128 }
 613         B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 }
 614         B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 }
 615     }
 616 } [
 617     { char-16-rep short-8-rep int-4-rep longlong-2-rep } [ sign-bit-mask ] map
 618 ] unit-test
 619
 620
 621 ! test with nonliteral/invalid reps
 622 [ simple-ops-cpu [ emit-simd-v+ ] test-emit-nonliteral-rep ]
 623 [ bad-simd-intrinsic? ] must-fail-with
 624
 625 [ simple-ops-cpu f [ emit-simd-v+ ] test-emit ]
 626 [ bad-simd-intrinsic? ] must-fail-with
 627
 628 [ simple-ops-cpu 3 [ emit-simd-v+ ] test-emit ]
 629 [ bad-simd-intrinsic? ] must-fail-with