basis/compiler/cfg/intrinsics/simd/simd-tests.factor

   1 ! (c)2009 Joe Groff bsd license
   2 USING: arrays assocs biassocs byte-arrays byte-arrays.hex
   3 classes compiler.cfg compiler.cfg.comparisons compiler.cfg.instructions
   4 compiler.cfg.intrinsics.simd compiler.cfg.intrinsics.simd.backend
   5 compiler.cfg.registers compiler.cfg.stacks.height compiler.cfg.stacks.local
   6 compiler.test compiler.tree compiler.tree.propagation.info
   7 cpu.architecture fry hashtables kernel locals make namespaces sequences
   8 system tools.test words ;
   9 IN: compiler.cfg.intrinsics.simd.tests
  10
  11 :: test-node ( rep -- node )
  12     T{ #call
  13         { in-d  { 1 2 3 4 } }
  14         { out-d { 5 } }
  15         { info H{
  16             { 1 T{ value-info-state { class byte-array } } }
  17             { 2 T{ value-info-state { class byte-array } } }
  18             { 3 T{ value-info-state { class byte-array } } }
  19             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
  20             { 5 T{ value-info-state { class byte-array } } }
  21         } }
  22     } ;
  23
  24 :: test-node-literal ( lit rep -- node )
  25     lit class-of :> lit-class
  26     T{ #call
  27         { in-d  { 1 2 3 4 } }
  28         { out-d { 5 } }
  29         { info H{
  30             { 1 T{ value-info-state { class byte-array } } }
  31             { 2 T{ value-info-state { class byte-array } } }
  32             { 3 T{ value-info-state { class lit-class } { literal? t } { literal lit } } }
  33             { 4 T{ value-info-state { class word } { literal? t } { literal rep } } }
  34             { 5 T{ value-info-state { class byte-array } } }
  35         } }
  36     } ;
  37
  38 : test-node-nonliteral-rep ( -- node )
  39     T{ #call
  40         { in-d  { 1 2 3 4 } }
  41         { out-d { 5 } }
  42         { info H{
  43             { 1 T{ value-info-state { class byte-array } } }
  44             { 2 T{ value-info-state { class byte-array } } }
  45             { 3 T{ value-info-state { class byte-array } } }
  46             { 4 T{ value-info-state { class object } } }
  47             { 5 T{ value-info-state { class byte-array } } }
  48         } }
  49     } ;
  50
  51 : test-compiler-env ( -- x )
  52     H{ } clone
  53     T{ basic-block }
  54     [ \ basic-block pick set-at ]
  55     [ 0 swap associate \ ds-heights pick set-at ]
  56     [ 0 swap associate \ rs-heights pick set-at ] tri
  57     initial-height-state \ height-state pick set-at
  58     HS{ } clone \ local-peek-set pick set-at
  59     H{ } clone \ replaces pick set-at
  60     H{ } <biassoc> \ locs>vregs pick set-at
  61     H{ } clone \ peek-sets pick set-at
  62     H{ } clone \ replace-sets pick set-at
  63     H{ } clone \ kill-sets pick set-at ;
  64
  65 : make-classes ( quot -- seq )
  66     { } make [ class-of ] map ; inline
  67
  68 : test-emit ( cpu rep quot -- node )
  69     [
  70         [ new \ cpu ] 2dip '[
  71             test-compiler-env [ _ test-node @ ] with-variables
  72         ] with-variable
  73     ] make-classes ; inline
  74
  75 : test-emit-literal ( cpu lit rep quot -- node )
  76     [
  77         [ new \ cpu ] 3dip '[
  78             test-compiler-env [ _ _ test-node-literal @ ] with-variables
  79         ] with-variable
  80     ] make-classes ; inline
  81
  82 : test-emit-nonliteral-rep ( cpu quot -- node )
  83     [
  84         [ new \ cpu ] dip '[
  85             test-compiler-env [ test-node-nonliteral-rep @ ] with-variables
  86         ] with-variable
  87     ] make-classes ; inline
  88
  89 CONSTANT: signed-reps
  90     { char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep }
  91 CONSTANT: all-reps
  92     {
  93         char-16-rep short-8-rep int-4-rep longlong-2-rep float-4-rep double-2-rep
  94         uchar-16-rep ushort-8-rep uint-4-rep ulonglong-2-rep
  95     }
  96
  97 TUPLE: scalar-cpu ;
  98
  99 TUPLE: simple-ops-cpu ;
 100 M: simple-ops-cpu %zero-vector-reps all-reps ;
 101 M: simple-ops-cpu %fill-vector-reps all-reps ;
 102 M: simple-ops-cpu %add-vector-reps all-reps ;
 103 M: simple-ops-cpu %sub-vector-reps all-reps ;
 104 M: simple-ops-cpu %mul-vector-reps all-reps ;
 105 M: simple-ops-cpu %div-vector-reps all-reps ;
 106 M: simple-ops-cpu %andn-vector-reps all-reps ;
 107 M: simple-ops-cpu %and-vector-reps all-reps ;
 108 M: simple-ops-cpu %or-vector-reps all-reps ;
 109 M: simple-ops-cpu %xor-vector-reps all-reps ;
 110 M: simple-ops-cpu %merge-vector-reps all-reps ;
 111 M: simple-ops-cpu %sqrt-vector-reps all-reps ;
 112 M: simple-ops-cpu %move-vector-mask-reps  all-reps ;
 113 M: simple-ops-cpu %test-vector-reps  all-reps ;
 114 M: simple-ops-cpu %signed-pack-vector-reps all-reps ;
 115 M: simple-ops-cpu %unsigned-pack-vector-reps all-reps ;
 116 M: simple-ops-cpu %gather-vector-2-reps { longlong-2-rep ulonglong-2-rep double-2-rep } ;
 117 M: simple-ops-cpu %gather-vector-4-reps { int-4-rep uint-4-rep float-4-rep } ;
 118 M: simple-ops-cpu %alien-vector-reps all-reps ;
 119
 120 ! v+
 121 { { ##add-vector } }
 122 [ simple-ops-cpu float-4-rep [ emit-simd-v+ ] test-emit ]
 123 unit-test
 124
 125 ! v-
 126 { { ##sub-vector } }
 127 [ simple-ops-cpu float-4-rep [ emit-simd-v- ] test-emit ]
 128 unit-test
 129
 130 ! vneg
 131 { { ##load-reference ##sub-vector } }
 132 [ simple-ops-cpu float-4-rep [ emit-simd-vneg ] test-emit ]
 133 unit-test
 134
 135 { { ##zero-vector ##sub-vector } }
 136 [ simple-ops-cpu int-4-rep [ emit-simd-vneg ] test-emit ]
 137 unit-test
 138
 139 ! v*
 140 { { ##mul-vector } }
 141 [ simple-ops-cpu float-4-rep [ emit-simd-v* ] test-emit ]
 142 unit-test
 143
 144 ! v/
 145 { { ##div-vector } }
 146 [ simple-ops-cpu float-4-rep [ emit-simd-v/ ] test-emit ]
 147 unit-test
 148
 149 TUPLE: addsub-cpu < simple-ops-cpu ;
 150 M: addsub-cpu %add-sub-vector-reps { int-4-rep float-4-rep } ;
 151
 152 ! v+-
 153 { { ##add-sub-vector } }
 154 [ addsub-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
 155 unit-test
 156
 157 { { ##load-reference ##xor-vector ##add-vector } }
 158 [ simple-ops-cpu float-4-rep [ emit-simd-v+- ] test-emit ]
 159 unit-test
 160
 161 { { ##load-reference ##xor-vector ##sub-vector ##add-vector } }
 162 [ simple-ops-cpu int-4-rep [ emit-simd-v+- ] test-emit ]
 163 unit-test
 164
 165 TUPLE: saturating-cpu < simple-ops-cpu ;
 166 M: saturating-cpu %saturated-add-vector-reps { int-4-rep } ;
 167 M: saturating-cpu %saturated-sub-vector-reps { int-4-rep } ;
 168 M: saturating-cpu %saturated-mul-vector-reps { int-4-rep } ;
 169
 170 ! vs+
 171 { { ##add-vector } }
 172 [ simple-ops-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
 173 unit-test
 174
 175 { { ##add-vector } }
 176 [ saturating-cpu float-4-rep [ emit-simd-vs+ ] test-emit ]
 177 unit-test
 178
 179 { { ##saturated-add-vector } }
 180 [ saturating-cpu int-4-rep [ emit-simd-vs+ ] test-emit ]
 181 unit-test
 182
 183 ! vs-
 184 { { ##sub-vector } }
 185 [ simple-ops-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
 186 unit-test
 187
 188 { { ##sub-vector } }
 189 [ saturating-cpu float-4-rep [ emit-simd-vs- ] test-emit ]
 190 unit-test
 191
 192 { { ##saturated-sub-vector } }
 193 [ saturating-cpu int-4-rep [ emit-simd-vs- ] test-emit ]
 194 unit-test
 195
 196 ! vs*
 197 { { ##mul-vector } }
 198 [ simple-ops-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
 199 unit-test
 200
 201 { { ##mul-vector } }
 202 [ saturating-cpu float-4-rep [ emit-simd-vs* ] test-emit ]
 203 unit-test
 204
 205 { { ##saturated-mul-vector } }
 206 [ saturating-cpu int-4-rep [ emit-simd-vs* ] test-emit ]
 207 unit-test
 208
 209 TUPLE: minmax-cpu < simple-ops-cpu ;
 210 M: minmax-cpu %min-vector-reps signed-reps ;
 211 M: minmax-cpu %max-vector-reps signed-reps ;
 212 M: minmax-cpu %compare-vector-reps { cc= cc/= } member? [ signed-reps ] [ { } ] if ;
 213 M: minmax-cpu %compare-vector-ccs nip f 2array 1array f ;
 214
 215 TUPLE: compare-cpu < simple-ops-cpu ;
 216 M: compare-cpu %compare-vector-reps drop signed-reps ;
 217 M: compare-cpu %compare-vector-ccs nip f 2array 1array f ;
 218
 219 ! vmin
 220 { { ##min-vector } }
 221 [ minmax-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
 222 unit-test
 223
 224 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 225 [ compare-cpu float-4-rep [ emit-simd-vmin ] test-emit ]
 226 unit-test
 227
 228 ! vmax
 229 { { ##max-vector } }
 230 [ minmax-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
 231 unit-test
 232
 233 { { ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 234 [ compare-cpu float-4-rep [ emit-simd-vmax ] test-emit ]
 235 unit-test
 236
 237 TUPLE: dot-cpu < simple-ops-cpu ;
 238 M: dot-cpu %dot-vector-reps { float-4-rep } ;
 239
 240 TUPLE: horizontal-cpu < simple-ops-cpu ;
 241 M: horizontal-cpu %horizontal-add-vector-reps signed-reps ;
 242 M: horizontal-cpu %unpack-vector-head-reps signed-reps ;
 243 M: horizontal-cpu %unpack-vector-tail-reps signed-reps ;
 244
 245 ! v.
 246 { { ##dot-vector } }
 247 [ dot-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 248 unit-test
 249
 250 { { ##mul-vector ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
 251 [ horizontal-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 252 unit-test
 253
 254 { {
 255     ##mul-vector
 256     ##merge-vector-head ##merge-vector-tail ##add-vector
 257     ##merge-vector-head ##merge-vector-tail ##add-vector
 258     ##vector>scalar
 259 } }
 260 [ simple-ops-cpu float-4-rep [ emit-simd-v. ] test-emit ]
 261 unit-test
 262
 263 ! vsqrt
 264 { { ##sqrt-vector } }
 265 [ simple-ops-cpu float-4-rep [ emit-simd-vsqrt ] test-emit ]
 266 unit-test
 267
 268 ! sum
 269 { { ##horizontal-add-vector ##vector>scalar } }
 270 [ horizontal-cpu double-2-rep [ emit-simd-sum ] test-emit ]
 271 unit-test
 272
 273 { { ##horizontal-add-vector ##horizontal-add-vector ##vector>scalar } }
 274 [ horizontal-cpu float-4-rep [ emit-simd-sum ] test-emit ]
 275 unit-test
 276
 277 { {
 278     ##unpack-vector-head ##unpack-vector-tail ##add-vector
 279     ##horizontal-add-vector ##horizontal-add-vector
 280     ##vector>scalar
 281 } }
 282 [ horizontal-cpu short-8-rep [ emit-simd-sum ] test-emit ]
 283 unit-test
 284
 285 { {
 286     ##unpack-vector-head ##unpack-vector-tail ##add-vector
 287     ##horizontal-add-vector ##horizontal-add-vector ##horizontal-add-vector
 288     ##vector>scalar
 289 } }
 290 [ horizontal-cpu char-16-rep [ emit-simd-sum ] test-emit ]
 291 unit-test
 292
 293 TUPLE: abs-cpu < simple-ops-cpu ;
 294 M: abs-cpu %abs-vector-reps signed-reps ;
 295
 296 ! vabs
 297 { { } }
 298 [ simple-ops-cpu uint-4-rep [ emit-simd-vabs ] test-emit ]
 299 unit-test
 300
 301 { { ##abs-vector } }
 302 [ abs-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
 303 unit-test
 304
 305 { { ##load-reference ##andn-vector } }
 306 [ simple-ops-cpu float-4-rep [ emit-simd-vabs ] test-emit ]
 307 unit-test
 308
 309 { { ##zero-vector ##sub-vector ##compare-vector ##and-vector ##andn-vector ##or-vector } }
 310 [ compare-cpu int-4-rep [ emit-simd-vabs ] test-emit ]
 311 unit-test
 312
 313 ! vand
 314 { { ##and-vector } }
 315 [ simple-ops-cpu float-4-rep [ emit-simd-vand ] test-emit ]
 316 unit-test
 317
 318 ! vandn
 319 { { ##andn-vector } }
 320 [ simple-ops-cpu float-4-rep [ emit-simd-vandn ] test-emit ]
 321 unit-test
 322
 323 ! vor
 324 { { ##or-vector } }
 325 [ simple-ops-cpu float-4-rep [ emit-simd-vor ] test-emit ]
 326 unit-test
 327
 328 ! vxor
 329 { { ##xor-vector } }
 330 [ simple-ops-cpu float-4-rep [ emit-simd-vxor ] test-emit ]
 331 unit-test
 332
 333 TUPLE: not-cpu < simple-ops-cpu ;
 334 M: not-cpu %not-vector-reps signed-reps ;
 335
 336 ! vnot
 337 { { ##not-vector } }
 338 [ not-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
 339 unit-test
 340
 341 { { ##fill-vector ##xor-vector } }
 342 [ simple-ops-cpu float-4-rep [ emit-simd-vnot ] test-emit ]
 343 unit-test
 344
 345 TUPLE: shift-cpu < simple-ops-cpu ;
 346 M: shift-cpu %shl-vector-reps signed-reps ;
 347 M: shift-cpu %shr-vector-reps signed-reps ;
 348
 349 TUPLE: shift-imm-cpu < simple-ops-cpu ;
 350 M: shift-imm-cpu %shl-vector-imm-reps signed-reps ;
 351 M: shift-imm-cpu %shr-vector-imm-reps signed-reps ;
 352
 353 TUPLE: horizontal-shift-cpu < simple-ops-cpu ;
 354 M: horizontal-shift-cpu %horizontal-shl-vector-imm-reps signed-reps ;
 355 M: horizontal-shift-cpu %horizontal-shr-vector-imm-reps signed-reps ;
 356
 357 ! vlshift
 358 { { ##shl-vector-imm } }
 359 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vlshift ] test-emit-literal ]
 360 unit-test
 361
 362 { { ##shl-vector } }
 363 [ shift-cpu int-4-rep [ emit-simd-vlshift ] test-emit ]
 364 unit-test
 365
 366 ! vrshift
 367 { { ##shr-vector-imm } }
 368 [ shift-imm-cpu 2 int-4-rep [ emit-simd-vrshift ] test-emit-literal ]
 369 unit-test
 370
 371 { { ##shr-vector } }
 372 [ shift-cpu int-4-rep [ emit-simd-vrshift ] test-emit ]
 373 unit-test
 374
 375 ! hlshift
 376 { { ##horizontal-shl-vector-imm } }
 377 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hlshift ] test-emit-literal ]
 378 unit-test
 379
 380 ! hrshift
 381 { { ##horizontal-shr-vector-imm } }
 382 [ horizontal-shift-cpu 2 int-4-rep [ emit-simd-hrshift ] test-emit-literal ]
 383 unit-test
 384
 385 TUPLE: shuffle-imm-cpu < simple-ops-cpu ;
 386 M: shuffle-imm-cpu %shuffle-vector-imm-reps signed-reps ;
 387
 388 TUPLE: shuffle-cpu < simple-ops-cpu ;
 389 M: shuffle-cpu %shuffle-vector-reps signed-reps ;
 390
 391 ! vshuffle-elements
 392 { { ##load-reference ##shuffle-vector } }
 393 [ shuffle-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
 394 unit-test
 395
 396 { { ##shuffle-vector-imm } }
 397 [ shuffle-imm-cpu { 0 1 2 3 } int-4-rep [ emit-simd-vshuffle-elements ] test-emit-literal ]
 398 unit-test
 399
 400 ! vshuffle-bytes
 401 { { ##shuffle-vector } }
 402 [ shuffle-cpu int-4-rep [ emit-simd-vshuffle-bytes ] test-emit ]
 403 unit-test
 404
 405 ! vmerge-head
 406 { { ##merge-vector-head } }
 407 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-head ] test-emit ]
 408 unit-test
 409
 410 ! vmerge-tail
 411 { { ##merge-vector-tail } }
 412 [ simple-ops-cpu float-4-rep [ emit-simd-vmerge-tail ] test-emit ]
 413 unit-test
 414
 415 ! v<= etc.
 416 { { ##compare-vector } }
 417 [ compare-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
 418 unit-test
 419
 420 { { ##min-vector ##compare-vector } }
 421 [ minmax-cpu int-4-rep [ emit-simd-v<= ] test-emit ]
 422 unit-test
 423
 424 { { ##load-reference ##xor-vector ##xor-vector ##compare-vector } }
 425 [ compare-cpu uint-4-rep [ emit-simd-v<= ] test-emit ]
 426 unit-test
 427
 428 ! vany? etc.
 429 { { ##test-vector } }
 430 [ simple-ops-cpu int-4-rep [ emit-simd-vany? ] test-emit ]
 431 unit-test
 432
 433 TUPLE: convert-cpu < simple-ops-cpu ;
 434 M: convert-cpu %integer>float-vector-reps { int-4-rep } ;
 435 M: convert-cpu %float>integer-vector-reps { float-4-rep } ;
 436
 437 ! v>float
 438 { { } }
 439 [ convert-cpu float-4-rep [ emit-simd-v>float ] test-emit ]
 440 unit-test
 441
 442 { { ##integer>float-vector } }
 443 [ convert-cpu int-4-rep [ emit-simd-v>float ] test-emit ]
 444 unit-test
 445
 446 ! v>integer
 447 { { } }
 448 [ convert-cpu int-4-rep [ emit-simd-v>integer ] test-emit ]
 449 unit-test
 450
 451 { { ##float>integer-vector } }
 452 [ convert-cpu float-4-rep [ emit-simd-v>integer ] test-emit ]
 453 unit-test
 454
 455 ! vpack-signed
 456 { { ##signed-pack-vector } }
 457 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-signed ] test-emit ]
 458 unit-test
 459
 460 ! vpack-unsigned
 461 { { ##unsigned-pack-vector } }
 462 [ simple-ops-cpu int-4-rep [ emit-simd-vpack-unsigned ] test-emit ]
 463 unit-test
 464
 465 TUPLE: unpack-head-cpu < simple-ops-cpu ;
 466 M: unpack-head-cpu %unpack-vector-head-reps all-reps ;
 467 TUPLE: unpack-cpu < unpack-head-cpu ;
 468 M: unpack-cpu %unpack-vector-tail-reps all-reps ;
 469
 470 ! vunpack-head
 471 { { ##unpack-vector-head } }
 472 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 473 unit-test
 474
 475 { { ##zero-vector ##merge-vector-head } }
 476 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-head ] test-emit ]
 477 unit-test
 478
 479 { { ##merge-vector-head ##shr-vector-imm } }
 480 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 481 unit-test
 482
 483 { { ##zero-vector ##compare-vector ##merge-vector-head } }
 484 [ compare-cpu int-4-rep [ emit-simd-vunpack-head ] test-emit ]
 485 unit-test
 486
 487 ! vunpack-tail
 488 { { ##unpack-vector-tail } }
 489 [ unpack-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 490 unit-test
 491
 492 { { ##tail>head-vector ##unpack-vector-head } }
 493 [ unpack-head-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 494 unit-test
 495
 496 { { ##zero-vector ##merge-vector-tail } }
 497 [ simple-ops-cpu uint-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 498 unit-test
 499
 500 { { ##merge-vector-tail ##shr-vector-imm } }
 501 [ shift-imm-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 502 unit-test
 503
 504 { { ##zero-vector ##compare-vector ##merge-vector-tail } }
 505 [ compare-cpu int-4-rep [ emit-simd-vunpack-tail ] test-emit ]
 506 unit-test
 507
 508 ! with
 509 { { ##scalar>vector ##shuffle-vector-imm } }
 510 [ shuffle-imm-cpu float-4-rep [ emit-simd-with ] test-emit ]
 511 unit-test
 512
 513 ! gather-2
 514 { { ##gather-vector-2 } }
 515 [ simple-ops-cpu double-2-rep [ emit-simd-gather-2 ] test-emit ]
 516 unit-test
 517
 518 ! gather-4
 519 { { ##gather-vector-4 } }
 520 [ simple-ops-cpu float-4-rep [ emit-simd-gather-4 ] test-emit ]
 521 unit-test
 522
 523 ! select
 524 { { ##shuffle-vector-imm ##vector>scalar } }
 525 [ shuffle-imm-cpu 1 float-4-rep [ emit-simd-select ] test-emit-literal ]
 526 unit-test
 527
 528 ! ^load-neg-zero-vector
 529 {
 530     V{
 531         T{ ##load-reference
 532            { dst 1 }
 533            { obj B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 } }
 534         }
 535         T{ ##load-reference
 536            { dst 2 }
 537            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 } }
 538         }
 539     }
 540 } [
 541     [
 542         { float-4-rep double-2-rep } [ ^load-neg-zero-vector drop ] each
 543     ] V{ } make
 544 ] cfg-unit-test
 545
 546 ! ^load-add-sub-vector
 547 {
 548     V{
 549         T{ ##load-reference
 550            { dst 1 }
 551            { obj B{ 0 0 0 128 0 0 0 0 0 0 0 128 0 0 0 0 } }
 552         }
 553         T{ ##load-reference
 554            { dst 2 }
 555            { obj B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 0 } }
 556         }
 557         T{ ##load-reference
 558            { dst 3 }
 559            { obj
 560              B{ 255 0 255 0 255 0 255 0 255 0 255 0 255 0 255 0 }
 561            }
 562         }
 563         T{ ##load-reference
 564            { dst 4 }
 565            { obj
 566              B{ 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 }
 567            }
 568         }
 569         T{ ##load-reference
 570            { dst 5 }
 571            { obj
 572              B{ 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 }
 573            }
 574         }
 575         T{ ##load-reference
 576            { dst 6 }
 577            { obj
 578              B{ 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 }
 579            }
 580         }
 581     }
 582 } [
 583     [
 584         {
 585             float-4-rep
 586             double-2-rep
 587             char-16-rep
 588             short-8-rep
 589             int-4-rep
 590             longlong-2-rep
 591         } [ ^load-add-sub-vector drop ] each
 592     ] V{ } make
 593 ] cfg-unit-test
 594
 595 ! ^load-half-vector
 596 {
 597     V{
 598         T{ ##load-reference
 599            { dst 1 }
 600            { obj B{ 0 0 0 63 0 0 0 63 0 0 0 63 0 0 0 63 } }
 601         }
 602         T{ ##load-reference
 603            { dst 2 }
 604            { obj B{ 0 0 0 0 0 0 224 63 0 0 0 0 0 0 224 63 } }
 605         }
 606     }
 607 } [
 608     [
 609         { float-4-rep double-2-rep } [ ^load-half-vector drop ] each
 610     ] V{ } make
 611 ] cfg-unit-test
 612
 613 ! sign-bit-mask
 614 {
 615     {
 616         B{ 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 128 }
 617         B{ 0 128 0 128 0 128 0 128 0 128 0 128 0 128 0 128 }
 618         B{ 0 0 0 128 0 0 0 128 0 0 0 128 0 0 0 128 }
 619         B{ 0 0 0 0 0 0 0 128 0 0 0 0 0 0 0 128 }
 620     }
 621 } [
 622     { char-16-rep short-8-rep int-4-rep longlong-2-rep } [ sign-bit-mask ] map
 623 ] unit-test
 624
 625
 626 ! test with nonliteral/invalid reps
 627 [ simple-ops-cpu [ emit-simd-v+ ] test-emit-nonliteral-rep ]
 628 [ bad-simd-intrinsic? ] must-fail-with
 629
 630 [ simple-ops-cpu f [ emit-simd-v+ ] test-emit ]
 631 [ bad-simd-intrinsic? ] must-fail-with
 632
 633 [ simple-ops-cpu 3 [ emit-simd-v+ ] test-emit ]
 634 [ bad-simd-intrinsic? ] must-fail-with