1 ! Copyright (C) 2008, 2009 Slava Pestov.
2 ! See http://factorcode.org/license.txt for BSD license.
3 USING: accessors kernel math assocs namespaces sequences heaps
4 fry make combinators sets locals arrays
5 cpu.architecture layouts
10 compiler.cfg.instructions
11 compiler.cfg.renaming.functor
12 compiler.cfg.linearization.order
13 compiler.cfg.linear-scan.allocation
14 compiler.cfg.linear-scan.allocation.state
15 compiler.cfg.linear-scan.live-intervals ;
16 FROM: namespaces => set ;
17 IN: compiler.cfg.linear-scan.assignment
19 ! This contains both active and inactive intervals; any interval
20 ! such that start <= insn# <= end is in this set.
21 SYMBOL: pending-interval-heap
22 SYMBOL: pending-interval-assoc
24 : add-pending ( live-interval -- )
25 [ dup end>> pending-interval-heap get heap-push ]
26 [ [ reg>> ] [ vreg>> ] bi pending-interval-assoc get set-at ]
29 : remove-pending ( live-interval -- )
30 vreg>> pending-interval-assoc get delete-at ;
32 ERROR: bad-vreg vreg ;
34 : (vreg>reg) ( vreg pending -- reg )
35 ! If a live vreg is not in the pending set, then it must
37 ?at [ spill-slots get ?at [ ] [ bad-vreg ] if ] unless ;
39 : vreg>reg ( vreg -- reg )
40 pending-interval-assoc get (vreg>reg) ;
42 : vregs>regs ( vregs -- assoc )
44 pending-interval-assoc get
45 '[ _ (vreg>reg) ] assoc-map
48 ! Minheap of live intervals which still need a register allocation
49 SYMBOL: unhandled-intervals
51 : add-unhandled ( live-interval -- )
52 dup start>> unhandled-intervals get heap-push ;
54 : init-unhandled ( live-intervals -- )
55 [ add-unhandled ] each ;
57 ! Mapping from basic blocks to values which are live at the start
58 SYMBOL: register-live-ins
60 ! Mapping from basic blocks to values which are live at the end
61 SYMBOL: register-live-outs
63 : init-assignment ( live-intervals -- )
64 <min-heap> pending-interval-heap set
65 H{ } clone pending-interval-assoc set
66 <min-heap> unhandled-intervals set
67 H{ } clone register-live-ins set
68 H{ } clone register-live-outs set
71 : insert-spill ( live-interval -- )
72 [ reg>> ] [ vreg>> rep-of ] [ spill-to>> ] tri _spill ;
74 : handle-spill ( live-interval -- )
75 dup spill-to>> [ insert-spill ] [ drop ] if ;
77 : expire-interval ( live-interval -- )
78 [ remove-pending ] [ handle-spill ] bi ;
80 : (expire-old-intervals) ( n heap -- )
81 dup heap-empty? [ 2drop ] [
82 2dup heap-peek nip <= [ 2drop ] [
83 dup heap-pop drop expire-interval
84 (expire-old-intervals)
88 : expire-old-intervals ( n -- )
89 pending-interval-heap get (expire-old-intervals) ;
91 : insert-reload ( live-interval -- )
92 [ reg>> ] [ vreg>> rep-of ] [ reload-from>> ] tri _reload ;
94 : handle-reload ( live-interval -- )
95 dup reload-from>> [ insert-reload ] [ drop ] if ;
97 : activate-interval ( live-interval -- )
98 [ add-pending ] [ handle-reload ] bi ;
100 : (activate-new-intervals) ( n heap -- )
101 dup heap-empty? [ 2drop ] [
102 2dup heap-peek nip = [
103 dup heap-pop drop activate-interval
104 (activate-new-intervals)
108 : activate-new-intervals ( n -- )
109 unhandled-intervals get (activate-new-intervals) ;
111 : prepare-insn ( n -- )
112 [ expire-old-intervals ] [ activate-new-intervals ] bi ;
114 GENERIC: assign-registers-in-insn ( insn -- )
116 RENAMING: assign [ vreg>reg ] [ vreg>reg ] [ vreg>reg ]
118 M: vreg-insn assign-registers-in-insn
119 [ assign-insn-defs ] [ assign-insn-uses ] [ assign-insn-temps ] tri ;
121 : trace-on-gc ( assoc -- assoc' )
122 ! When a GC occurs, virtual registers which contain tagged data
123 ! are traced by the GC. Outputs a sequence physical registers.
124 [ drop rep-of int-rep eq? ] { } assoc-filter-as values ;
126 : spill-on-gc? ( vreg reg -- ? )
127 [ rep-of int-rep? not ] [ spill-slot? not ] bi* and ;
129 : spill-on-gc ( assoc -- assoc' )
130 ! When a GC occurs, virtual registers which contain untagged data,
131 ! and are stored in physical registers, are saved to their spill
132 ! slots. Outputs sequence of triples:
133 ! - physical register
139 [ swap [ rep-of ] [ vreg-spill-slot ] bi 3array , ] [ 2drop ] if
143 : gc-root-offsets ( registers -- alist )
144 ! Outputs a sequence of { offset register/spill-slot } pairs
145 [ length iota [ cell * ] map ] keep zip ;
147 M: ##gc assign-registers-in-insn
148 ! Since ##gc is always the first instruction in a block, the set of
149 ! values live at the ##gc is just live-in.
151 basic-block get register-live-ins get at
152 [ trace-on-gc gc-root-offsets >>tagged-values ] [ spill-on-gc >>data-values ] bi
155 M: insn assign-registers-in-insn drop ;
157 : begin-block ( bb -- )
159 dup block-from activate-new-intervals
160 [ live-in vregs>regs ] keep register-live-ins get set-at ;
162 : end-block ( bb -- )
163 [ live-out vregs>regs ] keep register-live-outs get set-at ;
165 : vreg-at-start ( vreg bb -- state )
166 register-live-ins get at ?at [ bad-vreg ] unless ;
168 : vreg-at-end ( vreg bb -- state )
169 register-live-outs get at ?at [ bad-vreg ] unless ;
171 :: assign-registers-in-block ( bb -- )
177 [ insn#>> 1 - prepare-insn ]
178 [ insn#>> prepare-insn ]
179 [ assign-registers-in-insn ]
185 ] change-instructions drop ;
187 : assign-registers ( live-intervals cfg -- )
188 [ init-assignment ] dip
189 linearization-order [ assign-registers-in-block ] each ;