1 USING: accessors arrays classes compiler.cfg
2 compiler.cfg.debugger compiler.cfg.instructions
3 compiler.cfg.linear-scan.debugger
4 compiler.cfg.linear-scan.live-intervals
5 compiler.cfg.linear-scan.numbering
6 compiler.cfg.linear-scan.resolve compiler.cfg.predecessors
7 compiler.cfg.registers compiler.cfg.rpo cpu.architecture kernel
8 namespaces tools.test vectors ;
9 IN: compiler.cfg.linear-scan.resolve.tests
12 { 3 4 } V{ 1 2 } clone [ { 5 6 } 3append-here ] keep >array
16 T{ ##peek f V int-regs 0 D 0 }
21 T{ ##replace f V int-regs 0 D 1 }
25 1 get 1vector 0 get (>>successors)
29 dup reverse-post-order number-instructions
32 CONSTANT: test-live-interval-1
37 { ranges V{ T{ live-range f 0 2 } T{ live-range f 4 6 } } }
43 0 get test-live-interval-1 spill-to
47 1 get test-live-interval-1 spill-to
50 CONSTANT: test-live-interval-2
55 { ranges V{ T{ live-range f 0 2 } T{ live-range f 4 6 } } }
61 0 get test-live-interval-2 reload-from
65 1 get test-live-interval-2 reload-from
70 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
71 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
75 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
76 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
82 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
83 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
84 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
88 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
89 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
90 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
96 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
97 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
98 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
102 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
103 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
104 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
110 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
111 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
112 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
116 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
117 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
118 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
124 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
125 T{ register->memory { from 1 } { to 2 } { reg-class int-regs } }
126 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
130 T{ register->memory { from 1 } { to 2 } { reg-class int-regs } }
131 T{ register->register { from 2 } { to 3 } { reg-class int-regs } }
132 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
138 T{ _copy { dst 5 } { src 4 } { class int-regs } }
139 T{ _spill { src 1 } { class int-regs } { n 6 } }
140 T{ _copy { dst 1 } { src 0 } { class int-regs } }
141 T{ _reload { dst 0 } { class int-regs } { n 6 } }
142 T{ _spill { src 1 } { class float-regs } { n 7 } }
143 T{ _copy { dst 1 } { src 0 } { class float-regs } }
144 T{ _reload { dst 0 } { class float-regs } { n 7 } }
148 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
149 T{ register->register { from 1 } { to 0 } { reg-class int-regs } }
150 T{ register->register { from 0 } { to 1 } { reg-class float-regs } }
151 T{ register->register { from 1 } { to 0 } { reg-class float-regs } }
152 T{ register->register { from 4 } { to 5 } { reg-class int-regs } }
153 } mapping-instructions
158 T{ _spill { src 1 } { class int-regs } { n 3 } }
159 T{ _copy { dst 1 } { src 0 } { class int-regs } }
160 T{ _copy { dst 0 } { src 2 } { class int-regs } }
161 T{ _reload { dst 2 } { class int-regs } { n 3 } }
165 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
166 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
167 T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
168 } mapping-instructions
173 T{ _spill { src 1 } { class int-regs } { n 3 } }
174 T{ _copy { dst 1 } { src 0 } { class int-regs } }
175 T{ _copy { dst 0 } { src 2 } { class int-regs } }
176 T{ _reload { dst 2 } { class int-regs } { n 3 } }
180 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
181 T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
182 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
183 } mapping-instructions
188 T{ _copy { dst 1 } { src 0 } { class int-regs } }
189 T{ _copy { dst 2 } { src 0 } { class int-regs } }
193 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
194 T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
195 } mapping-instructions
202 T{ register->register { from 4 } { to 4 } { reg-class int-regs } }
203 } mapping-instructions
207 { T{ _spill { src 4 } { class int-regs } { n 4 } } }
210 T{ register->memory { from 4 } { to 4 } { reg-class int-regs } }
211 } mapping-instructions