1 USING: accessors arrays classes compiler.cfg
2 compiler.cfg.debugger compiler.cfg.instructions
3 compiler.cfg.linear-scan.debugger
4 compiler.cfg.linear-scan.live-intervals
5 compiler.cfg.linear-scan.numbering
6 compiler.cfg.linear-scan.allocation.state
7 compiler.cfg.linear-scan.resolve compiler.cfg.predecessors
8 compiler.cfg.registers compiler.cfg.rpo cpu.architecture kernel
9 namespaces tools.test vectors ;
10 IN: compiler.cfg.linear-scan.resolve.tests
13 { 3 4 } V{ 1 2 } clone [ { 5 6 } 3append-here ] keep >array
16 H{ { int-regs 10 } { float-regs 20 } } clone spill-counts set
17 H{ } clone spill-temps set
21 T{ _copy { dst 5 } { src 4 } { class int-regs } }
22 T{ _spill { src 1 } { class int-regs } { n 10 } }
23 T{ _copy { dst 1 } { src 0 } { class int-regs } }
24 T{ _reload { dst 0 } { class int-regs } { n 10 } }
25 T{ _spill { src 1 } { class float-regs } { n 20 } }
26 T{ _copy { dst 1 } { src 0 } { class float-regs } }
27 T{ _reload { dst 0 } { class float-regs } { n 20 } }
31 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
32 T{ register->register { from 1 } { to 0 } { reg-class int-regs } }
33 T{ register->register { from 0 } { to 1 } { reg-class float-regs } }
34 T{ register->register { from 1 } { to 0 } { reg-class float-regs } }
35 T{ register->register { from 4 } { to 5 } { reg-class int-regs } }
36 } mapping-instructions
41 T{ _spill { src 2 } { class int-regs } { n 10 } }
42 T{ _copy { dst 2 } { src 1 } { class int-regs } }
43 T{ _copy { dst 1 } { src 0 } { class int-regs } }
44 T{ _reload { dst 0 } { class int-regs } { n 10 } }
48 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
49 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
50 T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
51 } mapping-instructions
56 T{ _spill { src 0 } { class int-regs } { n 10 } }
57 T{ _copy { dst 0 } { src 2 } { class int-regs } }
58 T{ _copy { dst 2 } { src 1 } { class int-regs } }
59 T{ _reload { dst 1 } { class int-regs } { n 10 } }
63 T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
64 T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
65 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
66 } mapping-instructions
71 T{ _copy { dst 1 } { src 0 } { class int-regs } }
72 T{ _copy { dst 2 } { src 0 } { class int-regs } }
76 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
77 T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
78 } mapping-instructions
85 T{ register->register { from 4 } { to 4 } { reg-class int-regs } }
86 } mapping-instructions
91 T{ _spill { src 3 } { class int-regs } { n 4 } }
92 T{ _reload { dst 2 } { class int-regs } { n 1 } }
96 T{ register->memory { from 3 } { to T{ spill-slot f 4 } } { reg-class int-regs } }
97 T{ memory->register { from T{ spill-slot f 1 } } { to 2 } { reg-class int-regs } }
98 } mapping-instructions
104 T{ _copy { dst 1 } { src 0 } { class int-regs } }
105 T{ _copy { dst 2 } { src 0 } { class int-regs } }
106 T{ _copy { dst 0 } { src 3 } { class int-regs } }
110 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
111 T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
112 T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
113 } mapping-instructions
118 T{ _copy { dst 1 } { src 0 } { class int-regs } }
119 T{ _copy { dst 2 } { src 0 } { class int-regs } }
120 T{ _spill { src 4 } { class int-regs } { n 10 } }
121 T{ _copy { dst 4 } { src 0 } { class int-regs } }
122 T{ _copy { dst 0 } { src 3 } { class int-regs } }
123 T{ _reload { dst 3 } { class int-regs } { n 10 } }
127 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
128 T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
129 T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
130 T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
131 T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
132 } mapping-instructions
137 T{ _copy { dst 2 } { src 0 } { class int-regs } }
138 T{ _copy { dst 9 } { src 1 } { class int-regs } }
139 T{ _copy { dst 1 } { src 0 } { class int-regs } }
140 T{ _spill { src 4 } { class int-regs } { n 10 } }
141 T{ _copy { dst 4 } { src 0 } { class int-regs } }
142 T{ _copy { dst 0 } { src 3 } { class int-regs } }
143 T{ _reload { dst 3 } { class int-regs } { n 10 } }
147 T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
148 T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
149 T{ register->register { from 1 } { to 9 } { reg-class int-regs } }
150 T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
151 T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
152 T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
153 } mapping-instructions