1 ! Copyright (C) 2005, 2009 Slava Pestov.
2 ! See http://factorcode.org/license.txt for BSD license.
3 USING: accessors assocs alien alien.c-types arrays strings
4 cpu.x86.assembler cpu.x86.assembler.private cpu.x86.assembler.operands
5 cpu.x86.features cpu.x86.features.private cpu.architecture kernel
6 kernel.private math memory namespaces make sequences words system
7 layouts combinators math.order fry locals compiler.constants
8 byte-arrays io macros quotations compiler compiler.units init vm
10 compiler.cfg.instructions
11 compiler.cfg.intrinsics
12 compiler.cfg.comparisons
13 compiler.cfg.stack-frame
14 compiler.codegen.fixup ;
15 FROM: layouts => cell ;
19 ! Add some methods to the assembler to be more useful to the backend
20 M: label JMP 0 JMP rc-relative label-fixup ;
21 M: label JUMPcc [ 0 ] dip JUMPcc rc-relative label-fixup ;
23 M: x86 vector-regs float-regs ;
25 HOOK: stack-reg cpu ( -- reg )
27 HOOK: reserved-area-size cpu ( -- n )
29 : stack@ ( n -- op ) stack-reg swap [+] ;
31 : param@ ( n -- op ) reserved-area-size + stack@ ;
33 : spill@ ( n -- op ) spill-offset param@ ;
35 : gc-root@ ( n -- op ) gc-root-offset param@ ;
37 : decr-stack-reg ( n -- )
38 dup 0 = [ drop ] [ stack-reg swap SUB ] if ;
40 : incr-stack-reg ( n -- )
41 dup 0 = [ drop ] [ stack-reg swap ADD ] if ;
43 : align-stack ( n -- n' )
44 os macosx? cpu x86.64? or [ 16 align ] when ;
46 M: x86 stack-frame-size ( stack-frame -- i )
47 (stack-frame-size) 3 cells reserved-area-size + + align-stack ;
49 ! Must be a volatile register not used for parameter passing, for safe
50 ! use in calls in and out of C
51 HOOK: temp-reg cpu ( -- reg )
53 HOOK: pic-tail-reg cpu ( -- reg )
55 M: x86 %load-immediate dup 0 = [ drop dup XOR ] [ MOV ] if ;
57 M: x86 %load-reference swap 0 MOV rc-absolute-cell rel-immediate ;
59 HOOK: ds-reg cpu ( -- reg )
60 HOOK: rs-reg cpu ( -- reg )
62 : reg-stack ( n reg -- op ) swap cells neg [+] ;
64 GENERIC: loc>operand ( loc -- operand )
66 M: ds-loc loc>operand n>> ds-reg reg-stack ;
67 M: rs-loc loc>operand n>> rs-reg reg-stack ;
69 M: x86 %peek loc>operand MOV ;
70 M: x86 %replace loc>operand swap MOV ;
71 : (%inc) ( n reg -- ) swap cells dup 0 > [ ADD ] [ neg SUB ] if ; inline
72 M: x86 %inc-d ( n -- ) ds-reg (%inc) ;
73 M: x86 %inc-r ( n -- ) rs-reg (%inc) ;
75 M: x86 %call ( word -- ) 0 CALL rc-relative rel-word-pic ;
77 : xt-tail-pic-offset ( -- n )
78 #! See the comment in vm/cpu-x86.hpp
81 M: x86 %jump ( word -- )
82 pic-tail-reg 0 MOV xt-tail-pic-offset rc-absolute-cell rel-here
83 0 JMP rc-relative rel-word-pic-tail ;
85 M: x86 %jump-label ( label -- ) 0 JMP rc-relative label-fixup ;
87 M: x86 %return ( -- ) 0 RET ;
89 : code-alignment ( align -- n )
90 [ building get length dup ] dip align swap - ;
95 :: (%slot-imm) ( obj slot tag -- op )
96 obj slot cells tag - [+] ; inline
98 M: x86 %slot ( dst obj slot -- ) [+] MOV ;
99 M: x86 %slot-imm ( dst obj slot tag -- ) (%slot-imm) MOV ;
100 M: x86 %set-slot ( src obj slot -- ) [+] swap MOV ;
101 M: x86 %set-slot-imm ( src obj slot tag -- ) (%slot-imm) swap MOV ;
103 :: two-operand ( dst src1 src2 rep -- dst src )
104 dst src2 eq? [ "Cannot handle this case" throw ] when
108 :: one-operand ( dst src rep -- dst )
112 M: x86 %add 2over eq? [ nip ADD ] [ [+] LEA ] if ;
113 M: x86 %add-imm 2over eq? [ nip ADD ] [ [+] LEA ] if ;
114 M: x86 %sub int-rep two-operand SUB ;
115 M: x86 %sub-imm 2over eq? [ nip SUB ] [ neg [+] LEA ] if ;
116 M: x86 %mul int-rep two-operand swap IMUL2 ;
117 M: x86 %mul-imm IMUL3 ;
118 M: x86 %and int-rep two-operand AND ;
119 M: x86 %and-imm int-rep two-operand AND ;
120 M: x86 %or int-rep two-operand OR ;
121 M: x86 %or-imm int-rep two-operand OR ;
122 M: x86 %xor int-rep two-operand XOR ;
123 M: x86 %xor-imm int-rep two-operand XOR ;
124 M: x86 %shl-imm int-rep two-operand SHL ;
125 M: x86 %shr-imm int-rep two-operand SHR ;
126 M: x86 %sar-imm int-rep two-operand SAR ;
128 M: x86 %min int-rep two-operand [ CMP ] [ CMOVG ] 2bi ;
129 M: x86 %max int-rep two-operand [ CMP ] [ CMOVL ] 2bi ;
131 M: x86 %not int-rep one-operand NOT ;
134 GENERIC: copy-register* ( dst src rep -- )
136 M: int-rep copy-register* drop MOV ;
137 M: tagged-rep copy-register* drop MOV ;
138 M: float-rep copy-register* drop MOVSS ;
139 M: double-rep copy-register* drop MOVSD ;
140 M: float-4-rep copy-register* drop MOVUPS ;
141 M: double-2-rep copy-register* drop MOVUPD ;
142 M: vector-rep copy-register* drop MOVDQU ;
144 M: x86 %copy ( dst src rep -- )
145 2over eq? [ 3drop ] [
146 [ [ dup spill-slot? [ n>> spill@ ] when ] bi@ ] dip
150 M: x86 %fixnum-add ( label dst src1 src2 -- )
151 int-rep two-operand ADD JO ;
153 M: x86 %fixnum-sub ( label dst src1 src2 -- )
154 int-rep two-operand SUB JO ;
156 M: x86 %fixnum-mul ( label dst src1 src2 -- )
157 int-rep two-operand swap IMUL2 JO ;
159 : bignum@ ( reg n -- op )
160 cells bignum tag-number - [+] ; inline
162 M:: x86 %integer>bignum ( dst src temp -- )
163 #! on entry, inreg is a signed 32-bit quantity
164 #! exits with tagged ptr to bignum in outreg
165 #! 1 cell header, 1 cell length, 1 cell sign, + digits
166 #! length is the # of digits + sign
169 ! Load cached zero value
170 dst 0 >bignum %load-reference
172 ! Is it zero? Then just go to the end and return this zero
175 dst 4 cells bignum temp %allot
177 dst 1 bignum@ 2 tag-fixnum MOV
179 dst 3 bignum@ src MOV
182 temp cell-bits 1 - SAR
185 dst 2 bignum@ temp MOV
186 ! Make negative value positive
192 dst 3 bignum@ temp MOV
196 M:: x86 %bignum>integer ( dst src temp -- )
200 temp src 1 bignum@ MOV
201 ! if the length is 1, its just the sign and nothing else,
204 temp 1 tag-fixnum CMP
207 dst src 3 bignum@ MOV
209 temp src 2 bignum@ MOV
210 ! convert it into -1 or 1
219 M: x86 %add-float double-rep two-operand ADDSD ;
220 M: x86 %sub-float double-rep two-operand SUBSD ;
221 M: x86 %mul-float double-rep two-operand MULSD ;
222 M: x86 %div-float double-rep two-operand DIVSD ;
223 M: x86 %min-float double-rep two-operand MINSD ;
224 M: x86 %max-float double-rep two-operand MAXSD ;
225 M: x86 %sqrt SQRTSD ;
227 M: x86 %single>double-float CVTSS2SD ;
228 M: x86 %double>single-float CVTSD2SS ;
230 M: x86 %integer>float CVTSI2SD ;
231 M: x86 %float>integer CVTTSD2SI ;
233 M: x86 %unbox-float ( dst src -- )
234 float-offset [+] MOVSD ;
236 M:: x86 %box-float ( dst src temp -- )
237 dst 16 float temp %allot
238 dst float-offset [+] src MOVSD ;
240 M:: x86 %box-vector ( dst src rep temp -- )
241 dst rep rep-size 2 cells + byte-array temp %allot
242 16 tag-fixnum dst 1 byte-array tag-number %set-slot-imm
243 dst byte-array-offset [+]
246 M:: x86 %unbox-vector ( dst src rep -- )
247 dst src byte-array-offset [+]
250 MACRO: available-reps ( alist -- )
251 ! Each SSE version adds new representations and supports
253 unzip { } [ append ] accumulate rest swap suffix
254 [ [ 1quotation ] map ] bi@ zip
255 reverse [ { } ] suffix
258 M: x86 %broadcast-vector ( dst src rep -- )
260 { float-4-rep [ [ float-4-rep %copy ] [ drop dup 0 SHUFPS ] 2bi ] }
261 { double-2-rep [ [ double-2-rep %copy ] [ drop dup UNPCKLPD ] 2bi ] }
264 M: x86 %broadcast-vector-reps
266 ! Can't do this with sse1 since it will want to unbox
267 ! a double-precision float and convert to single precision
268 { sse2? { float-4-rep double-2-rep } }
271 M:: x86 %gather-vector-4 ( dst src1 src2 src3 src4 rep -- )
276 dst src1 float-4-rep %copy
284 M: x86 %gather-vector-4-reps
286 ! Can't do this with sse1 since it will want to unbox
287 ! double-precision floats and convert to single precision
288 { sse2? { float-4-rep } }
291 M:: x86 %gather-vector-2 ( dst src1 src2 rep -- )
296 dst src1 double-2-rep %copy
302 M: x86 %gather-vector-2-reps
304 { sse2? { double-2-rep } }
307 M: x86 %add-vector ( dst src1 src2 rep -- )
310 { float-4-rep [ ADDPS ] }
311 { double-2-rep [ ADDPD ] }
312 { char-16-rep [ PADDB ] }
313 { uchar-16-rep [ PADDB ] }
314 { short-8-rep [ PADDW ] }
315 { ushort-8-rep [ PADDW ] }
316 { int-4-rep [ PADDD ] }
317 { uint-4-rep [ PADDD ] }
318 { longlong-2-rep [ PADDQ ] }
319 { ulonglong-2-rep [ PADDQ ] }
322 M: x86 %add-vector-reps
324 { sse? { float-4-rep } }
325 { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
328 M: x86 %saturated-add-vector ( dst src1 src2 rep -- )
331 { char-16-rep [ PADDSB ] }
332 { uchar-16-rep [ PADDUSB ] }
333 { short-8-rep [ PADDSW ] }
334 { ushort-8-rep [ PADDUSW ] }
337 M: x86 %saturated-add-vector-reps
339 { sse2? { char-16-rep uchar-16-rep short-8-rep ushort-8-rep } }
342 M: x86 %add-sub-vector ( dst src1 src2 rep -- )
345 { float-4-rep [ ADDSUBPS ] }
346 { double-2-rep [ ADDSUBPD ] }
349 M: x86 %add-sub-vector-reps
351 { sse3? { float-4-rep double-2-rep } }
354 M: x86 %sub-vector ( dst src1 src2 rep -- )
357 { float-4-rep [ SUBPS ] }
358 { double-2-rep [ SUBPD ] }
359 { char-16-rep [ PSUBB ] }
360 { uchar-16-rep [ PSUBB ] }
361 { short-8-rep [ PSUBW ] }
362 { ushort-8-rep [ PSUBW ] }
363 { int-4-rep [ PSUBD ] }
364 { uint-4-rep [ PSUBD ] }
365 { longlong-2-rep [ PSUBQ ] }
366 { ulonglong-2-rep [ PSUBQ ] }
369 M: x86 %sub-vector-reps
371 { sse? { float-4-rep } }
372 { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
375 M: x86 %saturated-sub-vector ( dst src1 src2 rep -- )
378 { char-16-rep [ PSUBSB ] }
379 { uchar-16-rep [ PSUBUSB ] }
380 { short-8-rep [ PSUBSW ] }
381 { ushort-8-rep [ PSUBUSW ] }
384 M: x86 %saturated-sub-vector-reps
386 { sse2? { char-16-rep uchar-16-rep short-8-rep ushort-8-rep } }
389 M: x86 %mul-vector ( dst src1 src2 rep -- )
392 { float-4-rep [ MULPS ] }
393 { double-2-rep [ MULPD ] }
394 { short-8-rep [ PMULLW ] }
395 { ushort-8-rep [ PMULLW ] }
396 { int-4-rep [ PMULLD ] }
397 { uint-4-rep [ PMULLD ] }
400 M: x86 %mul-vector-reps
402 { sse? { float-4-rep } }
403 { sse2? { double-2-rep short-8-rep ushort-8-rep } }
404 { sse4.1? { int-4-rep uint-4-rep } }
407 M: x86 %saturated-mul-vector-reps
408 ! No multiplication with saturation on x86
411 M: x86 %div-vector ( dst src1 src2 rep -- )
414 { float-4-rep [ DIVPS ] }
415 { double-2-rep [ DIVPD ] }
418 M: x86 %div-vector-reps
420 { sse? { float-4-rep } }
421 { sse2? { double-2-rep } }
424 M: x86 %min-vector ( dst src1 src2 rep -- )
427 { char-16-rep [ PMINSB ] }
428 { uchar-16-rep [ PMINUB ] }
429 { short-8-rep [ PMINSW ] }
430 { ushort-8-rep [ PMINUW ] }
431 { int-4-rep [ PMINSD ] }
432 { uint-4-rep [ PMINUD ] }
433 { float-4-rep [ MINPS ] }
434 { double-2-rep [ MINPD ] }
437 M: x86 %min-vector-reps
439 { sse? { float-4-rep } }
440 { sse2? { uchar-16-rep short-8-rep double-2-rep short-8-rep uchar-16-rep } }
441 { sse4.1? { char-16-rep ushort-8-rep int-4-rep uint-4-rep } }
444 M: x86 %max-vector ( dst src1 src2 rep -- )
447 { char-16-rep [ PMAXSB ] }
448 { uchar-16-rep [ PMAXUB ] }
449 { short-8-rep [ PMAXSW ] }
450 { ushort-8-rep [ PMAXUW ] }
451 { int-4-rep [ PMAXSD ] }
452 { uint-4-rep [ PMAXUD ] }
453 { float-4-rep [ MAXPS ] }
454 { double-2-rep [ MAXPD ] }
457 M: x86 %max-vector-reps
459 { sse? { float-4-rep } }
460 { sse2? { uchar-16-rep short-8-rep double-2-rep short-8-rep uchar-16-rep } }
461 { sse4.1? { char-16-rep ushort-8-rep int-4-rep uint-4-rep } }
464 M: x86 %horizontal-add-vector ( dst src rep -- )
466 { float-4-rep [ [ float-4-rep %copy ] [ HADDPS ] [ HADDPS ] 2tri ] }
467 { double-2-rep [ [ double-2-rep %copy ] [ HADDPD ] 2bi ] }
470 M: x86 %horizontal-add-vector-reps
472 { sse3? { float-4-rep double-2-rep } }
475 M: x86 %abs-vector ( dst src rep -- )
477 { char-16-rep [ PABSB ] }
478 { short-8-rep [ PABSW ] }
479 { int-4-rep [ PABSD ] }
482 M: x86 %abs-vector-reps
484 { ssse3? { char-16-rep short-8-rep int-4-rep } }
487 M: x86 %sqrt-vector ( dst src rep -- )
489 { float-4-rep [ SQRTPS ] }
490 { double-2-rep [ SQRTPD ] }
493 M: x86 %sqrt-vector-reps
495 { sse? { float-4-rep } }
496 { sse2? { double-2-rep } }
499 M: x86 %and-vector ( dst src1 src2 rep -- )
502 { float-4-rep [ ANDPS ] }
503 { double-2-rep [ ANDPD ] }
507 M: x86 %and-vector-reps
509 { sse? { float-4-rep } }
510 { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
513 M: x86 %or-vector ( dst src1 src2 rep -- )
516 { float-4-rep [ ORPS ] }
517 { double-2-rep [ ORPD ] }
521 M: x86 %or-vector-reps
523 { sse? { float-4-rep } }
524 { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
527 M: x86 %xor-vector ( dst src1 src2 rep -- )
530 { float-4-rep [ XORPS ] }
531 { double-2-rep [ XORPD ] }
535 M: x86 %xor-vector-reps
537 { sse? { float-4-rep } }
538 { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
541 M: x86 %shl-vector ( dst src1 src2 rep -- )
544 { short-8-rep [ PSLLW ] }
545 { ushort-8-rep [ PSLLW ] }
546 { int-4-rep [ PSLLD ] }
547 { uint-4-rep [ PSLLD ] }
548 { longlong-2-rep [ PSLLQ ] }
549 { ulonglong-2-rep [ PSLLQ ] }
552 M: x86 %shl-vector-reps
554 { sse2? { short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
557 M: x86 %shr-vector ( dst src1 src2 rep -- )
560 { short-8-rep [ PSRAW ] }
561 { ushort-8-rep [ PSRLW ] }
562 { int-4-rep [ PSRAD ] }
563 { uint-4-rep [ PSRLD ] }
564 { ulonglong-2-rep [ PSRLQ ] }
567 M: x86 %shr-vector-reps
569 { sse2? { short-8-rep ushort-8-rep int-4-rep uint-4-rep ulonglong-2-rep } }
572 M: x86 %integer>scalar drop MOVD ;
574 M: x86 %scalar>integer drop MOVD ;
576 M: x86 %unbox-alien ( dst src -- )
577 alien-offset [+] MOV ;
579 M:: x86 %unbox-any-c-ptr ( dst src temp -- )
581 { "is-byte-array" "end" "start" } [ define-label ] each
584 ! We come back here with displaced aliens
585 "start" resolve-label
587 temp \ f tag-number CMP
589 ! Is the object an alien?
590 temp header-offset [+] alien type-number tag-fixnum CMP
591 "is-byte-array" get JNE
592 ! If so, load the offset and add it to the address
593 dst temp alien-offset [+] ADD
594 ! Now recurse on the underlying alien
595 temp temp underlying-alien-offset [+] MOV
597 "is-byte-array" resolve-label
598 ! Add byte array address to address being computed
600 ! Add an offset to start of byte array's data
601 dst byte-array-offset ADD
605 : alien@ ( reg n -- op ) cells alien tag-number - [+] ;
607 :: %allot-alien ( dst displacement base temp -- )
608 dst 4 cells alien temp %allot
609 dst 1 alien@ base MOV ! alien
610 dst 2 alien@ \ f tag-number MOV ! expired
611 dst 3 alien@ displacement MOV ! displacement
614 M:: x86 %box-alien ( dst src temp -- )
617 dst \ f tag-number MOV
620 dst src \ f tag-number temp %allot-alien
624 M:: x86 %box-displaced-alien ( dst displacement base displacement' base' base-class -- )
628 ! If displacement is zero, return the base
632 ! Quickly use displacement' before its needed for real, as allot temporary
633 dst 4 cells alien displacement' %allot
634 ! If base is already a displaced alien, unpack it
636 displacement' displacement MOV
637 base \ f tag-number CMP
639 base header-offset [+] alien type-number tag-fixnum CMP
641 ! displacement += base.displacement
642 displacement' base 3 alien@ ADD
644 base' base 1 alien@ MOV
646 dst 1 alien@ base' MOV ! alien
647 dst 2 alien@ \ f tag-number MOV ! expired
648 dst 3 alien@ displacement' MOV ! displacement
652 ! The 'small-reg' mess is pretty crappy, but its only used on x86-32.
653 ! On x86-64, all registers have 8-bit versions. However, a similar
654 ! problem arises for shifts, where the shift count must be in CL, and
655 ! so one day I will fix this properly by adding precoloring to the
656 ! register allocator.
658 HOOK: has-small-reg? cpu ( reg size -- ? )
660 CONSTANT: have-byte-regs { EAX ECX EDX EBX }
662 M: x86.32 has-small-reg?
664 { 8 [ have-byte-regs memq? ] }
669 M: x86.64 has-small-reg? 2drop t ;
671 : small-reg-that-isn't ( exclude -- reg' )
672 [ have-byte-regs ] dip
673 [ native-version-of ] map
674 '[ _ memq? not ] find nip ;
676 : with-save/restore ( reg quot -- )
677 [ drop PUSH ] [ call ] [ drop POP ] 2tri ; inline
679 :: with-small-register ( dst exclude size quot: ( new-dst -- ) -- )
680 ! If the destination register overlaps a small register with
681 ! 'size' bits, we call the quot with that. Otherwise, we find a
682 ! small register that is not in exclude, and call quot, saving and
683 ! restoring the small register.
684 dst size has-small-reg? [ dst quot call ] [
685 exclude small-reg-that-isn't
686 [ quot call ] with-save/restore
689 M:: x86 %string-nth ( dst src index temp -- )
690 ! We request a small-reg of size 8 since those of size 16 are
693 dst { src index temp } 8 [| new-dst |
694 ! Load the least significant 7 bits into new-dst.
695 ! 8th bit indicates whether we have to load from
696 ! the aux vector or not.
697 temp src index [+] LEA
698 new-dst 8-bit-version-of temp string-offset [+] MOV
699 new-dst new-dst 8-bit-version-of MOVZX
700 ! Do we have to look at the aux vector?
703 ! Yes, this is a non-ASCII character. Load aux vector
704 temp src string-aux-offset [+] MOV
710 new-dst 16-bit-version-of new-dst byte-array-offset [+] MOV
711 new-dst new-dst 16-bit-version-of MOVZX
716 dst new-dst int-rep %copy
717 ] with-small-register ;
719 M:: x86 %set-string-nth-fast ( ch str index temp -- )
720 ch { index str temp } 8 [| new-ch |
721 new-ch ch int-rep %copy
722 temp str index [+] LEA
723 temp string-offset [+] new-ch 8-bit-version-of MOV
724 ] with-small-register ;
726 :: %alien-integer-getter ( dst src size quot -- )
727 dst { src } size [| new-dst |
728 new-dst dup size n-bit-version-of dup src [] MOV
730 dst new-dst int-rep %copy
731 ] with-small-register ; inline
733 : %alien-unsigned-getter ( dst src size -- )
734 [ MOVZX ] %alien-integer-getter ; inline
736 M: x86 %alien-unsigned-1 8 %alien-unsigned-getter ;
737 M: x86 %alien-unsigned-2 16 %alien-unsigned-getter ;
738 M: x86 %alien-unsigned-4 32 [ 2drop ] %alien-integer-getter ;
740 : %alien-signed-getter ( dst src size -- )
741 [ MOVSX ] %alien-integer-getter ; inline
743 M: x86 %alien-signed-1 8 %alien-signed-getter ;
744 M: x86 %alien-signed-2 16 %alien-signed-getter ;
745 M: x86 %alien-signed-4 32 %alien-signed-getter ;
747 M: x86 %alien-cell [] MOV ;
748 M: x86 %alien-float [] MOVSS ;
749 M: x86 %alien-double [] MOVSD ;
750 M: x86 %alien-vector [ [] ] dip %copy ;
752 :: %alien-integer-setter ( ptr value size -- )
753 value { ptr } size [| new-value |
754 new-value value int-rep %copy
755 ptr [] new-value size n-bit-version-of MOV
756 ] with-small-register ; inline
758 M: x86 %set-alien-integer-1 8 %alien-integer-setter ;
759 M: x86 %set-alien-integer-2 16 %alien-integer-setter ;
760 M: x86 %set-alien-integer-4 32 %alien-integer-setter ;
761 M: x86 %set-alien-cell [ [] ] dip MOV ;
762 M: x86 %set-alien-float [ [] ] dip MOVSS ;
763 M: x86 %set-alien-double [ [] ] dip MOVSD ;
764 M: x86 %set-alien-vector [ [] ] 2dip %copy ;
766 : shift-count? ( reg -- ? ) { ECX RCX } memq? ;
768 :: emit-shift ( dst src1 src2 quot -- )
777 ECX native-version-of [
779 drop dst CL quot call
784 M: x86 %shl [ SHL ] emit-shift ;
785 M: x86 %shr [ SHR ] emit-shift ;
786 M: x86 %sar [ SAR ] emit-shift ;
788 M: x86 %vm-field-ptr ( dst field -- )
789 [ drop 0 MOV rc-absolute-cell rt-vm rel-fixup ]
790 [ vm-field-offset ADD ] 2bi ;
792 : load-zone-ptr ( reg -- )
793 #! Load pointer to start of zone array
794 "nursery" %vm-field-ptr ;
796 : load-allot-ptr ( nursery-ptr allot-ptr -- )
797 [ drop load-zone-ptr ] [ swap cell [+] MOV ] 2bi ;
799 : inc-allot-ptr ( nursery-ptr n -- )
800 [ cell [+] ] dip 8 align ADD ;
802 : store-header ( temp class -- )
803 [ [] ] [ type-number tag-fixnum ] bi* MOV ;
805 : store-tagged ( dst tag -- )
808 M:: x86 %allot ( dst size class nursery-ptr -- )
809 nursery-ptr dst load-allot-ptr
810 dst class store-header
811 dst class store-tagged
812 nursery-ptr size inc-allot-ptr ;
815 M:: x86 %write-barrier ( src card# table -- )
816 #! Mark the card pointed to by vreg.
820 table "cards_offset" %vm-field-ptr
822 table card# [+] card-mark <byte> MOV
825 card# deck-bits card-bits - SHR
826 table "decks_offset" %vm-field-ptr
828 table card# [+] card-mark <byte> MOV ;
830 M:: x86 %check-nursery ( label temp1 temp2 -- )
832 temp2 temp1 cell [+] MOV
834 temp1 temp1 3 cells [+] MOV
838 M: x86 %save-gc-root ( gc-root register -- ) [ gc-root@ ] dip MOV ;
840 M: x86 %load-gc-root ( gc-root register -- ) swap gc-root@ MOV ;
842 M: x86 %alien-global ( dst symbol library -- )
843 [ 0 MOV ] 2dip rc-absolute-cell rel-dlsym ;
845 M: x86 %epilogue ( n -- ) cell - incr-stack-reg ;
847 :: %boolean ( dst temp word -- )
848 dst \ f tag-number MOV
849 temp 0 MOV \ t rc-absolute-cell rel-immediate
850 dst temp word execute ; inline
852 M:: x86 %compare ( dst src1 src2 cc temp -- )
855 { cc< [ dst temp \ CMOVL %boolean ] }
856 { cc<= [ dst temp \ CMOVLE %boolean ] }
857 { cc> [ dst temp \ CMOVG %boolean ] }
858 { cc>= [ dst temp \ CMOVGE %boolean ] }
859 { cc= [ dst temp \ CMOVE %boolean ] }
860 { cc/= [ dst temp \ CMOVNE %boolean ] }
863 M: x86 %compare-imm ( dst src1 src2 cc temp -- )
866 : %cmov-float= ( dst src -- )
868 "no-move" define-label
870 "no-move" get [ JNE ] [ JP ] bi
872 "no-move" resolve-label
875 : %cmov-float/= ( dst src -- )
877 "no-move" define-label
884 "no-move" resolve-label
887 :: (%compare-float) ( dst src1 src2 cc temp compare -- )
889 { cc< [ src2 src1 \ compare execute( a b -- ) dst temp \ CMOVA %boolean ] }
890 { cc<= [ src2 src1 \ compare execute( a b -- ) dst temp \ CMOVAE %boolean ] }
891 { cc> [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVA %boolean ] }
892 { cc>= [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVAE %boolean ] }
893 { cc= [ src1 src2 \ compare execute( a b -- ) dst temp \ %cmov-float= %boolean ] }
894 { cc<> [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVNE %boolean ] }
895 { cc<>= [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVNP %boolean ] }
896 { cc/< [ src2 src1 \ compare execute( a b -- ) dst temp \ CMOVBE %boolean ] }
897 { cc/<= [ src2 src1 \ compare execute( a b -- ) dst temp \ CMOVB %boolean ] }
898 { cc/> [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVBE %boolean ] }
899 { cc/>= [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVB %boolean ] }
900 { cc/= [ src1 src2 \ compare execute( a b -- ) dst temp \ %cmov-float/= %boolean ] }
901 { cc/<> [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVE %boolean ] }
902 { cc/<>= [ src1 src2 \ compare execute( a b -- ) dst temp \ CMOVP %boolean ] }
905 M: x86 %compare-float-ordered ( dst src1 src2 cc temp -- )
906 \ COMISD (%compare-float) ;
908 M: x86 %compare-float-unordered ( dst src1 src2 cc temp -- )
909 \ UCOMISD (%compare-float) ;
911 M:: x86 %compare-branch ( label src1 src2 cc -- )
915 { cc<= [ label JLE ] }
917 { cc>= [ label JGE ] }
919 { cc/= [ label JNE ] }
922 M: x86 %compare-imm-branch ( label src1 src2 cc -- )
925 : %jump-float= ( label -- )
927 "no-jump" define-label
930 "no-jump" resolve-label
933 : %jump-float/= ( label -- )
936 :: (%compare-float-branch) ( label src1 src2 cc compare -- )
938 { cc< [ src2 src1 \ compare execute( a b -- ) label JA ] }
939 { cc<= [ src2 src1 \ compare execute( a b -- ) label JAE ] }
940 { cc> [ src1 src2 \ compare execute( a b -- ) label JA ] }
941 { cc>= [ src1 src2 \ compare execute( a b -- ) label JAE ] }
942 { cc= [ src1 src2 \ compare execute( a b -- ) label %jump-float= ] }
943 { cc<> [ src1 src2 \ compare execute( a b -- ) label JNE ] }
944 { cc<>= [ src1 src2 \ compare execute( a b -- ) label JNP ] }
945 { cc/< [ src2 src1 \ compare execute( a b -- ) label JBE ] }
946 { cc/<= [ src2 src1 \ compare execute( a b -- ) label JB ] }
947 { cc/> [ src1 src2 \ compare execute( a b -- ) label JBE ] }
948 { cc/>= [ src1 src2 \ compare execute( a b -- ) label JB ] }
949 { cc/= [ src1 src2 \ compare execute( a b -- ) label %jump-float/= ] }
950 { cc/<> [ src1 src2 \ compare execute( a b -- ) label JE ] }
951 { cc/<>= [ src1 src2 \ compare execute( a b -- ) label JP ] }
954 M: x86 %compare-float-ordered-branch ( label src1 src2 cc -- )
955 \ COMISD (%compare-float-branch) ;
957 M: x86 %compare-float-unordered-branch ( label src1 src2 cc -- )
958 \ UCOMISD (%compare-float-branch) ;
960 M:: x86 %spill ( src rep dst -- ) dst src rep %copy ;
961 M:: x86 %reload ( dst rep src -- ) dst src rep %copy ;
963 M: x86 %loop-entry 16 code-alignment [ NOP ] times ;
965 M:: x86 %save-context ( temp1 temp2 callback-allowed? -- )
966 #! Save Factor stack pointers in case the C code calls a
967 #! callback which does a GC, which must reliably trace
969 temp1 0 MOV rc-absolute-cell rt-vm rel-fixup
970 temp1 temp1 "stack_chain" vm-field-offset [+] MOV
971 temp2 stack-reg cell neg [+] LEA
974 temp1 2 cells [+] ds-reg MOV
975 temp1 3 cells [+] rs-reg MOV
978 M: x86 value-struct? drop t ;
980 M: x86 small-enough? ( n -- ? )
981 HEX: -80000000 HEX: 7fffffff between? ;
983 : next-stack@ ( n -- operand )
984 #! nth parameter from the next stack frame. Used to box
985 #! input values to callbacks; the callback has its own
986 #! stack frame set up, and we want to read the frame
987 #! set up by the caller.
988 stack-frame get total-size>> + stack@ ;
994 :: install-sse2-check ( -- )
997 "This image was built to use SSE2 but your CPU does not support it." print
998 "You will need to bootstrap Factor again." print
1002 ] "cpu.x86" add-init-hook ;
1004 : enable-sse2 ( version -- )
1006 enable-float-intrinsics
1008 enable-float-min/max
1009 enable-float-functions
1014 [ { sse_version } compile ] with-optimizer
1015 "Checking for multimedia extensions: " write sse-version
1016 [ sse-string write " detected" print ] [ enable-sse2 ] bi ;