1 ! Copyright (C) 2006 Chris Double.
2 ! See http://factorcode.org/license.txt for BSD license.
4 USING: kernel math sequences words arrays io
5 io.files namespaces math.parser kernel.private
6 assocs quotations parser parser-combinators tools.time
10 TUPLE: cpu b c d e f h l a pc sp halted? last-interrupt cycles ram ;
12 GENERIC: reset ( cpu -- )
13 GENERIC: update-video ( value addr cpu -- )
14 GENERIC: read-port ( port cpu -- byte )
15 GENERIC: write-port ( value port cpu -- )
17 M: cpu update-video ( value addr cpu -- )
20 M: cpu read-port ( port cpu -- byte )
21 #! Read a byte from the hardware port. 'port' should
25 M: cpu write-port ( value port cpu -- )
26 #! Write a byte to the hardware port, where 'port' is
30 : carry-flag HEX: 01 ; inline
31 : parity-flag HEX: 04 ; inline
32 : half-carry-flag HEX: 10 ; inline
33 : interrupt-flag HEX: 20 ; inline
34 : zero-flag HEX: 40 ; inline
35 : sign-flag HEX: 80 ; inline
37 : >word< ( word -- byte byte )
38 #! Explode a word into its two 8 bit values.
39 dup HEX: FF bitand swap -8 shift HEX: FF bitand swap ;
41 : cpu-af ( cpu -- word )
42 #! Return the 16-bit pseudo register AF.
43 [ cpu-a 8 shift ] keep cpu-f bitor ;
45 : set-cpu-af ( value cpu -- )
46 #! Set the value of the 16-bit pseudo register AF
47 >r >word< r> tuck set-cpu-f set-cpu-a ;
49 : cpu-bc ( cpu -- word )
50 #! Return the 16-bit pseudo register BC.
51 [ cpu-b 8 shift ] keep cpu-c bitor ;
53 : set-cpu-bc ( value cpu -- )
54 #! Set the value of the 16-bit pseudo register BC
55 >r >word< r> tuck set-cpu-c set-cpu-b ;
57 : cpu-de ( cpu -- word )
58 #! Return the 16-bit pseudo register DE.
59 [ cpu-d 8 shift ] keep cpu-e bitor ;
61 : set-cpu-de ( value cpu -- )
62 #! Set the value of the 16-bit pseudo register DE
63 >r >word< r> tuck set-cpu-e set-cpu-d ;
65 : cpu-hl ( cpu -- word )
66 #! Return the 16-bit pseudo register HL.
67 [ cpu-h 8 shift ] keep cpu-l bitor ;
69 : set-cpu-hl ( value cpu -- )
70 #! Set the value of the 16-bit pseudo register HL
71 >r >word< r> tuck set-cpu-l set-cpu-h ;
73 : flag-set? ( flag cpu -- bool )
74 cpu-f bitand 0 = not ;
76 : flag-clear? ( flag cpu -- bool )
79 : flag-nz? ( cpu -- bool )
81 cpu-f zero-flag bitand 0 = ;
83 : flag-z? ( cpu -- bool )
85 cpu-f zero-flag bitand 0 = not ;
87 : flag-nc? ( cpu -- bool )
89 cpu-f carry-flag bitand 0 = ;
91 : flag-c? ( cpu -- bool )
93 cpu-f carry-flag bitand 0 = not ;
95 : flag-po? ( cpu -- bool )
97 cpu-f parity-flag bitand 0 = ;
99 : flag-pe? ( cpu -- bool )
101 cpu-f parity-flag bitand 0 = not ;
103 : flag-p? ( cpu -- bool )
105 cpu-f sign-flag bitand 0 = ;
107 : flag-m? ( cpu -- bool )
109 cpu-f sign-flag bitand 0 = not ;
111 : read-byte ( addr cpu -- byte )
112 #! Read one byte from memory at the specified address.
113 #! The address is 16-bit, but if a value greater than
114 #! 0xFFFF is provided then return a default value.
121 : read-word ( addr cpu -- word )
122 #! Read a 16-bit word from memory at the specified address.
123 #! The address is 16-bit, but if a value greater than
124 #! 0xFFFF is provided then return a default value.
125 [ read-byte ] 2keep >r 1 + r> read-byte 8 shift bitor ;
127 : next-byte ( cpu -- byte )
128 #! Return the value of the byte at PC, and increment PC.
134 : next-word ( cpu -- word )
135 #! Return the value of the word at PC, and increment PC.
142 : write-byte ( value addr cpu -- )
143 #! Write a byte to the specified memory address.
144 over dup HEX: 2000 < swap HEX: FFFF > or [
152 : write-word ( value addr cpu -- )
153 #! Write a 16-bit word to the specified memory address.
154 >r >r >word< r> r> [ write-byte ] 2keep >r 1 + r> write-byte ;
156 : cpu-a-bitand ( quot cpu -- )
158 [ cpu-a swap call bitand ] keep set-cpu-a ; inline
160 : cpu-a-bitor ( quot cpu -- )
162 [ cpu-a swap call bitor ] keep set-cpu-a ; inline
164 : cpu-a-bitxor ( quot cpu -- )
166 [ cpu-a swap call bitxor ] keep set-cpu-a ; inline
168 : cpu-a-bitxor= ( value cpu -- )
170 [ cpu-a bitxor ] keep set-cpu-a ;
172 : cpu-f-bitand ( quot cpu -- )
174 [ cpu-f swap call bitand ] keep set-cpu-f ; inline
176 : cpu-f-bitor ( quot cpu -- )
178 [ cpu-f swap call bitor ] keep set-cpu-f ; inline
180 : cpu-f-bitxor ( quot cpu -- )
182 [ cpu-f swap call bitxor ] keep set-cpu-f ; inline
184 : cpu-f-bitor= ( value cpu -- )
186 [ cpu-f bitor ] keep set-cpu-f ;
188 : cpu-f-bitand= ( value cpu -- )
190 [ cpu-f bitand ] keep set-cpu-f ;
192 : cpu-f-bitxor= ( value cpu -- )
194 [ cpu-f bitxor ] keep set-cpu-f ;
196 : set-flag ( cpu flag -- )
199 : clear-flag ( cpu flag -- )
200 bitnot HEX: FF bitand swap cpu-f-bitand= ;
202 : update-zero-flag ( result cpu -- )
203 #! If the result of an instruction has the value 0, this
204 #! flag is set, otherwise it is reset.
205 swap HEX: FF bitand 0 = [ zero-flag set-flag ] [ zero-flag clear-flag ] if ;
207 : update-sign-flag ( result cpu -- )
208 #! If the most significant bit of the result
209 #! has the value 1 then the flag is set, otherwise
211 swap HEX: 80 bitand 0 = [ sign-flag clear-flag ] [ sign-flag set-flag ] if ;
213 : update-parity-flag ( result cpu -- )
214 #! If the modulo 2 sum of the bits of the result
215 #! is 0, (ie. if the result has even parity) this flag
216 #! is set, otherwise it is reset.
217 swap HEX: FF bitand 2 mod 0 = [ parity-flag set-flag ] [ parity-flag clear-flag ] if ;
219 : update-carry-flag ( result cpu -- )
220 #! If the instruction resulted in a carry (from addition)
221 #! or a borrow (from subtraction or a comparison) out of the
222 #! higher order bit, this flag is set, otherwise it is reset.
223 swap dup HEX: 100 >= swap 0 < or [ carry-flag set-flag ] [ carry-flag clear-flag ] if ;
225 : update-half-carry-flag ( original change-by result cpu -- )
226 #! If the instruction caused a carry out of bit 3 and into bit 4 of the
227 #! resulting value, the half carry flag is set, otherwise it is reset.
228 #! The 'original' is the original value of the register being changed.
229 #! 'change-by' is the amount it is being added or decremented by.
230 #! 'result' is the result of that change.
231 >r bitxor bitxor HEX: 10 bitand 0 = not r>
232 swap [ half-carry-flag set-flag ] [ half-carry-flag clear-flag ] if ;
234 : update-flags ( result cpu -- )
235 2dup update-carry-flag
236 2dup update-parity-flag
237 2dup update-sign-flag
240 : update-flags-no-carry ( result cpu -- )
241 2dup update-parity-flag
242 2dup update-sign-flag
245 : add-byte ( lhs rhs cpu -- result )
247 >r 2dup + r> ! lhs rhs result cpu
248 [ update-flags ] 2keep
249 [ update-half-carry-flag ] 2keep
250 drop HEX: FF bitand ;
252 : add-carry ( change-by result cpu -- change-by result )
253 #! Add the effect of the carry flag to the result
254 flag-c? [ 1 + >r 1 + r> ] when ;
256 : add-byte-with-carry ( lhs rhs cpu -- result )
257 #! Add rhs to lhs plus carry.
258 >r 2dup + r> ! lhs rhs result cpu
260 [ update-flags ] 2keep
261 [ update-half-carry-flag ] 2keep
262 drop HEX: FF bitand ;
264 : sub-carry ( change-by result cpu -- change-by result )
265 #! Subtract the effect of the carry flag from the result
266 flag-c? [ 1 - >r 1 - r> ] when ;
268 : sub-byte ( lhs rhs cpu -- result )
269 #! Subtract rhs from lhs
271 [ update-flags ] 2keep
272 [ update-half-carry-flag ] 2keep
273 drop HEX: FF bitand ;
275 : sub-byte-with-carry ( lhs rhs cpu -- result )
276 #! Subtract rhs from lhs and take carry into account
279 [ update-flags ] 2keep
280 [ update-half-carry-flag ] 2keep
281 drop HEX: FF bitand ;
283 : inc-byte ( byte cpu -- result )
284 #! Increment byte by one. Note that carry flag is not affected
285 #! by this operation.
286 >r 1 2dup + r> ! lhs rhs result cpu
287 [ update-flags-no-carry ] 2keep
288 [ update-half-carry-flag ] 2keep
289 drop HEX: FF bitand ;
291 : dec-byte ( byte cpu -- result )
292 #! Decrement byte by one. Note that carry flag is not affected
293 #! by this operation.
294 >r 1 2dup - r> ! lhs rhs result cpu
295 [ update-flags-no-carry ] 2keep
296 [ update-half-carry-flag ] 2keep
297 drop HEX: FF bitand ;
299 : inc-word ( w cpu -- w )
300 #! Increment word by one. Note that no flags are modified.
301 drop 1 + HEX: FFFF bitand ;
303 : dec-word ( w cpu -- w )
304 #! Decrement word by one. Note that no flags are modified.
305 drop 1 - HEX: FFFF bitand ;
307 : add-word ( lhs rhs cpu -- result )
308 #! Add rhs to lhs. Note that only the carry flag is modified
309 #! and only if there is a carry out of the double precision add.
310 >r + r> over HEX: FFFF > [ carry-flag set-flag ] [ drop ] if HEX: FFFF bitand ;
312 : bit3or ( lhs rhs -- 0|1 )
313 #! bitor bit 3 of the two numbers on the stack
314 BIN: 00001000 bitand -3 shift >r
315 BIN: 00001000 bitand -3 shift r>
318 : and-byte ( lhs rhs cpu -- result )
319 #! Logically and rhs to lhs. The carry flag is cleared and
320 #! the half carry is set to the ORing of bits 3 of the operands.
321 [ drop bit3or ] 3keep ! bit3or lhs rhs cpu
322 >r bitand r> [ update-flags ] 2keep
323 [ carry-flag clear-flag ] keep
324 rot 0 = [ half-carry-flag set-flag ] [ half-carry-flag clear-flag ] if
327 : xor-byte ( lhs rhs cpu -- result )
328 #! Logically xor rhs to lhs. The carry and half-carry flags are cleared.
329 >r bitxor r> [ update-flags ] 2keep
330 [ half-carry-flag carry-flag bitor clear-flag ] keep
331 drop HEX: FF bitand ;
333 : or-byte ( lhs rhs cpu -- result )
334 #! Logically or rhs to lhs. The carry and half-carry flags are cleared.
335 >r bitor r> [ update-flags ] 2keep
336 [ half-carry-flag carry-flag bitor clear-flag ] keep
337 drop HEX: FF bitand ;
339 : flags ( seq -- seq )
340 [ 0 [ execute bitor ] reduce ] map ;
342 : decrement-sp ( n cpu -- )
343 #! Decrement the stackpointer by n.
345 >r swap - r> set-cpu-sp ;
348 #! Save the value of the PC on the stack.
349 [ cpu-pc ] keep ! pc cpu
350 [ cpu-sp ] keep ! pc sp cpu
354 #! Push the value of the PC on the stack.
358 : pop-pc ( cpu -- pc )
359 #! Pop the value of the PC off the stack.
362 -2 swap decrement-sp ;
364 : push-sp ( value cpu -- )
365 [ 2 swap decrement-sp ] keep
369 : pop-sp ( cpu -- value )
372 -2 swap decrement-sp ;
374 : call-sub ( addr cpu -- )
375 #! Call the address as a subroutine.
377 >r HEX: FFFF bitand r> set-cpu-pc ;
379 : ret-from-sub ( cpu -- )
380 [ pop-pc ] keep set-cpu-pc ;
382 : interrupt ( number cpu -- )
383 #! Perform a hardware interrupt
384 ! "***Interrupt: " write over 16 >base print
385 dup cpu-f interrupt-flag bitand 0 = not [
392 : inc-cycles ( n cpu -- )
393 #! Increment the number of cpu cycles
394 [ cpu-cycles + ] keep set-cpu-cycles ;
396 : instruction-cycles ( -- vector )
397 #! Return a 256 element vector containing the cycles for
398 #! each opcode in the 8080 instruction set.
400 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
401 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
402 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
403 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
404 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
405 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
406 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
407 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f } ;
409 : instructions ( -- vector )
410 #! Return a 256 element vector containing the emulation words for
411 #! each opcode in the 8080 instruction set.
413 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
414 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
415 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
416 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
417 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
418 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
419 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
420 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f } ;
422 : not-implemented ( <cpu> -- )
425 instructions length [
426 dup instructions nth [
429 [ not-implemented ] swap instructions set-nth
433 M: cpu reset ( cpu -- )
434 #! Reset the CPU to its poweron state
435 [ 0 swap set-cpu-b ] keep
436 [ 0 swap set-cpu-c ] keep
437 [ 0 swap set-cpu-d ] keep
438 [ 0 swap set-cpu-e ] keep
439 [ 0 swap set-cpu-h ] keep
440 [ 0 swap set-cpu-l ] keep
441 [ 0 swap set-cpu-a ] keep
442 [ 0 swap set-cpu-f ] keep
443 [ 0 swap set-cpu-pc ] keep
444 [ HEX: F000 swap set-cpu-sp ] keep
445 [ HEX: FFFF 0 <array> swap set-cpu-ram ] keep
446 [ f swap set-cpu-halted? ] keep
447 [ HEX: 10 swap set-cpu-last-interrupt ] keep
448 0 swap set-cpu-cycles ;
450 : <cpu> ( -- cpu ) cpu construct-empty dup reset ;
452 : (load-rom) ( n ram -- )
454 -rot [ set-nth ] 2keep >r 1 + r> (load-rom)
459 #! Reads the ROM from stdin and stores it in ROM from
461 : load-rom ( filename cpu -- )
462 #! Load the contents of the file into ROM.
463 #! (address 0x0000-0x1FFF).
464 cpu-ram swap <file-reader> [
470 : rom-dir ( -- string )
471 rom-root get [ home "roms" path+ dup exists? [ drop f ] unless ] unless* ;
473 : load-rom* ( seq cpu -- )
474 #! 'seq' is an array of arrays. Each array contains
475 #! an address and filename of a ROM file. The ROM
476 #! file will be loaded at the specified address. This
477 #! file path shoul dbe relative to the '/roms' resource path.
480 swap first2 rom-dir swap path+ <file-reader> [
487 "Set 'rom-root' to the path containing the root of the 8080 ROM files." throw
490 : read-instruction ( cpu -- word )
491 #! Read the next instruction from the cpu's program
492 #! counter, and increment the program counter.
493 [ cpu-pc ] keep ! pc cpu
494 [ over 1 + swap set-cpu-pc ] keep
497 : get-cycles ( n -- opcode )
498 #! Returns the cycles for the given instruction value.
499 #! If the opcode is not defined throw an error.
500 dup instruction-cycles nth [
503 [ "Undefined 8080 opcode: " % number>string % ] "" make throw
506 : process-interrupts ( cpu -- )
507 #! Process any hardware interrupts
512 [ >r 16667 - r> set-cpu-cycles ] keep
513 dup cpu-last-interrupt HEX: 10 = [
514 HEX: 08 over set-cpu-last-interrupt HEX: 08 swap interrupt
516 HEX: 10 over set-cpu-last-interrupt HEX: 10 swap interrupt
521 #! Run a single 8080 instruction
522 [ read-instruction ] keep ! n cpu
523 over get-cycles over inc-cycles
524 [ swap instructions dispatch ] keep
525 [ cpu-pc HEX: FFFF bitand ] keep
529 : peek-instruction ( cpu -- word )
530 #! Return the next instruction from the cpu's program
531 #! counter, but don't increment the counter.
532 [ cpu-pc ] keep read-byte instructions nth first ;
535 [ " PC: " write cpu-pc 16 >base 4 CHAR: \s pad-left write ] keep
536 [ " B: " write cpu-b 16 >base 2 CHAR: \s pad-left write ] keep
537 [ " C: " write cpu-c 16 >base 2 CHAR: \s pad-left write ] keep
538 [ " D: " write cpu-d 16 >base 2 CHAR: \s pad-left write ] keep
539 [ " E: " write cpu-e 16 >base 2 CHAR: \s pad-left write ] keep
540 [ " F: " write cpu-f 16 >base 2 CHAR: \s pad-left write ] keep
541 [ " H: " write cpu-h 16 >base 2 CHAR: \s pad-left write ] keep
542 [ " L: " write cpu-l 16 >base 2 CHAR: \s pad-left write ] keep
543 [ " A: " write cpu-a 16 >base 2 CHAR: \s pad-left write ] keep
544 [ " SP: " write cpu-sp 16 >base 4 CHAR: \s pad-left write ] keep
545 [ " cycles: " write cpu-cycles number>string 5 CHAR: \s pad-left write ] keep
546 [ " " write peek-instruction word-name write " " write ] keep
550 [ " PC: " write cpu-pc 16 >base 4 CHAR: \s pad-left write ] keep
551 [ " B: " write cpu-b 16 >base 2 CHAR: \s pad-left write ] keep
552 [ " C: " write cpu-c 16 >base 2 CHAR: \s pad-left write ] keep
553 [ " D: " write cpu-d 16 >base 2 CHAR: \s pad-left write ] keep
554 [ " E: " write cpu-e 16 >base 2 CHAR: \s pad-left write ] keep
555 [ " F: " write cpu-f 16 >base 2 CHAR: \s pad-left write ] keep
556 [ " H: " write cpu-h 16 >base 2 CHAR: \s pad-left write ] keep
557 [ " L: " write cpu-l 16 >base 2 CHAR: \s pad-left write ] keep
558 [ " A: " write cpu-a 16 >base 2 CHAR: \s pad-left write ] keep
559 [ " SP: " write cpu-sp 16 >base 4 CHAR: \s pad-left write ] keep
560 [ " cycles: " write cpu-cycles number>string 5 CHAR: \s pad-left write ] keep
563 : test-step ( cpu -- cpu )
564 [ step ] keep dup cpu. ;
566 : test-cpu ( -- cpu )
567 <cpu> "invaders.rom" over load-rom dup cpu. ;
570 test-cpu swap [ test-step ] times ;
572 : run-n ( cpu n -- cpu )
575 : register-lookup ( string -- vector )
576 #! Given a string containing a register name, return a vector
577 #! where the 1st item is the getter and the 2nd is the setter
578 #! for that register.
580 { "A" { cpu-a set-cpu-a } }
581 { "B" { cpu-b set-cpu-b } }
582 { "C" { cpu-c set-cpu-c } }
583 { "D" { cpu-d set-cpu-d } }
584 { "E" { cpu-e set-cpu-e } }
585 { "H" { cpu-h set-cpu-h } }
586 { "L" { cpu-l set-cpu-l } }
587 { "AF" { cpu-af set-cpu-af } }
588 { "BC" { cpu-bc set-cpu-bc } }
589 { "DE" { cpu-de set-cpu-de } }
590 { "HL" { cpu-hl set-cpu-hl } }
591 { "SP" { cpu-sp set-cpu-sp } }
595 : flag-lookup ( string -- vector )
596 #! Given a string containing a flag name, return a vector
597 #! where the 1st item is a word that tests that flag.
599 { "NZ" { flag-nz? } }
600 { "NC" { flag-nc? } }
601 { "PO" { flag-po? } }
602 { "PE" { flag-pe? } }
614 : replace-patterns ( vector tree -- tree )
615 #! Copy the tree, replacing each occurence of
616 #! $1, $2, etc with the relevant item from the
618 dup quotation? over [ ] = not and [ ! vector tree
619 dup first swap 1 tail ! vector car cdr
620 >r dupd replace-patterns ! vector v R: cdr
621 swap r> replace-patterns >r 1quotation r> append
623 dup $1 = [ drop 0 over nth ] when
624 dup $2 = [ drop 1 over nth ] when
625 dup $3 = [ drop 2 over nth ] when
626 dup $4 = [ drop 3 over nth ] when
631 { 4 5 3 } [ 1 $2 [ $1 4 ] ] replace-patterns ;
633 : (emulate-RST) ( n cpu -- )
635 [ cpu-sp 2 - dup ] keep ! sp sp cpu
636 [ set-cpu-sp ] keep ! sp cpu
637 [ cpu-pc ] keep ! sp pc cpu
638 swapd [ write-word ] keep ! cpu
639 >r 8 * r> set-cpu-pc ;
641 : (emulate-CALL) ( cpu -- )
643 [ next-word HEX: FFFF bitand ] keep ! addr cpu
644 [ cpu-sp 2 - dup ] keep ! addr sp sp cpu
645 [ set-cpu-sp ] keep ! addr sp cpu
646 [ cpu-pc ] keep ! addr sp pc cpu
647 swapd [ write-word ] keep ! addr cpu
650 : (emulate-RLCA) ( cpu -- )
651 #! The content of the accumulator is rotated left
652 #! one position. The low order bit and the carry flag
653 #! are both set to the value shifd out of the high
654 #! order bit position. Only the carry flag is affected.
655 [ cpu-a -7 shift ] keep
656 over 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
657 [ cpu-a 1 shift HEX: FF bitand ] keep
658 >r bitor r> set-cpu-a ;
660 : (emulate-RRCA) ( cpu -- )
661 #! The content of the accumulator is rotated right
662 #! one position. The high order bit and the carry flag
663 #! are both set to the value shifd out of the low
664 #! order bit position. Only the carry flag is affected.
665 [ cpu-a 1 bitand 7 shift ] keep
666 over 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
667 [ cpu-a 254 bitand -1 shift ] keep
668 >r bitor r> set-cpu-a ;
670 : (emulate-RLA) ( cpu -- )
671 #! The content of the accumulator is rotated left
672 #! one position through the carry flag. The low
673 #! order bit is set equal to the carry flag and
674 #! the carry flag is set to the value shifd out
675 #! of the high order bit. Only the carry flag is
677 [ carry-flag swap flag-set? [ 1 ] [ 0 ] if ] keep
678 [ cpu-a 127 bitand 7 shift ] keep
679 dup cpu-a 128 bitand 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
680 >r bitor r> set-cpu-a ;
682 : (emulate-RRA) ( cpu -- )
683 #! The content of the accumulator is rotated right
684 #! one position through the carry flag. The high order
685 #! bit is set to the carry flag and the carry flag is
686 #! set to the value shifd out of the low order bit.
687 #! Only the carry flag is affected.
688 [ carry-flag swap flag-set? [ BIN: 10000000 ] [ 0 ] if ] keep
689 [ cpu-a 254 bitand -1 shift ] keep
690 dup cpu-a 1 bitand 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
691 >r bitor r> set-cpu-a ;
693 : (emulate-CPL) ( cpu -- )
694 #! The contents of the accumulator are complemented
695 #! (zero bits become one, one bits becomes zero).
696 #! No flags are affected.
697 HEX: FF swap cpu-a-bitxor= ;
699 : (emulate-DAA) ( cpu -- )
700 #! The eight bit number in the accumulator is
701 #! adjusted to form two four-bit binary-coded-decimal
704 dup half-carry-flag swap flag-set? swap
705 cpu-a BIN: 1111 bitand 9 > or [ 6 ] [ 0 ] if
708 [ update-flags ] 2keep
709 [ swap HEX: FF bitand swap set-cpu-a ] keep
711 dup carry-flag swap flag-set? swap
712 cpu-a -4 shift BIN: 1111 bitand 9 > or [ 96 ] [ 0 ] if
715 [ update-flags ] 2keep
716 swap HEX: FF bitand swap set-cpu-a ;
718 : patterns ( -- hashtable )
719 #! table of code quotation patterns for each type of instruction.
722 { "RET-NN" [ ret-from-sub ] }
723 { "RST-0" [ 0 swap (emulate-RST) ] }
724 { "RST-8" [ 8 swap (emulate-RST) ] }
725 { "RST-10H" [ HEX: 10 swap (emulate-RST) ] }
726 { "RST-18H" [ HEX: 18 swap (emulate-RST) ] }
727 { "RST-20H" [ HEX: 20 swap (emulate-RST) ] }
728 { "RST-28H" [ HEX: 28 swap (emulate-RST) ] }
729 { "RST-30H" [ HEX: 30 swap (emulate-RST) ] }
730 { "RST-38H" [ HEX: 38 swap (emulate-RST) ] }
731 { "RET-F|FF" [ dup $1 [ 6 over inc-cycles ret-from-sub ] [ drop ] if ] }
732 { "CP-N" [ [ cpu-a ] keep [ next-byte ] keep sub-byte drop ] }
733 { "CP-R" [ [ cpu-a ] keep [ $1 ] keep sub-byte drop ] }
734 { "CP-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep sub-byte drop ] }
735 { "OR-N" [ [ cpu-a ] keep [ next-byte ] keep [ or-byte ] keep set-cpu-a ] }
736 { "OR-R" [ [ cpu-a ] keep [ $1 ] keep [ or-byte ] keep set-cpu-a ] }
737 { "OR-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ or-byte ] keep set-cpu-a ] }
738 { "XOR-N" [ [ cpu-a ] keep [ next-byte ] keep [ xor-byte ] keep set-cpu-a ] }
739 { "XOR-R" [ [ cpu-a ] keep [ $1 ] keep [ xor-byte ] keep set-cpu-a ] }
740 { "XOR-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ xor-byte ] keep set-cpu-a ] }
741 { "AND-N" [ [ cpu-a ] keep [ next-byte ] keep [ and-byte ] keep set-cpu-a ] }
742 { "AND-R" [ [ cpu-a ] keep [ $1 ] keep [ and-byte ] keep set-cpu-a ] }
743 { "AND-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ and-byte ] keep set-cpu-a ] }
744 { "ADC-R,N" [ [ $1 ] keep [ next-byte ] keep [ add-byte-with-carry ] keep $2 ] }
745 { "ADC-R,R" [ [ $1 ] keep [ $3 ] keep [ add-byte-with-carry ] keep $2 ] }
746 { "ADC-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ add-byte-with-carry ] keep $2 ] }
747 { "ADD-R,N" [ [ $1 ] keep [ next-byte ] keep [ add-byte ] keep $2 ] }
748 { "ADD-R,R" [ [ $1 ] keep [ $3 ] keep [ add-byte ] keep $2 ] }
749 { "ADD-RR,RR" [ [ $1 ] keep [ $3 ] keep [ add-word ] keep $2 ] }
750 { "ADD-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ add-byte ] keep $2 ] }
751 { "SBC-R,N" [ [ $1 ] keep [ next-byte ] keep [ sub-byte-with-carry ] keep $2 ] }
752 { "SBC-R,R" [ [ $1 ] keep [ $3 ] keep [ sub-byte-with-carry ] keep $2 ] }
753 { "SBC-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ sub-byte-with-carry ] keep $2 ] }
754 { "SUB-R" [ [ cpu-a ] keep [ $1 ] keep [ sub-byte ] keep set-cpu-a ] }
755 { "SUB-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ sub-byte ] keep set-cpu-a ] }
756 { "SUB-N" [ [ cpu-a ] keep [ next-byte ] keep [ sub-byte ] keep set-cpu-a ] }
757 { "CPL" [ (emulate-CPL) ] }
758 { "DAA" [ (emulate-DAA) ] }
759 { "RLA" [ (emulate-RLA) ] }
760 { "RRA" [ (emulate-RRA) ] }
761 { "CCF" [ carry-flag swap cpu-f-bitxor= ] }
762 { "SCF" [ carry-flag swap cpu-f-bitor= ] }
763 { "RLCA" [ (emulate-RLCA) ] }
764 { "RRCA" [ (emulate-RRCA) ] }
766 { "DI" [ [ 255 interrupt-flag - ] swap cpu-f-bitand ] }
767 { "EI" [ [ interrupt-flag ] swap cpu-f-bitor ] }
768 { "POP-RR" [ [ pop-sp ] keep $2 ] }
769 { "PUSH-RR" [ [ $1 ] keep push-sp ] }
770 { "INC-R" [ [ $1 ] keep [ inc-byte ] keep $2 ] }
771 { "DEC-R" [ [ $1 ] keep [ dec-byte ] keep $2 ] }
772 { "INC-RR" [ [ $1 ] keep [ inc-word ] keep $2 ] }
773 { "DEC-RR" [ [ $1 ] keep [ dec-word ] keep $2 ] }
774 { "DEC-(RR)" [ [ $1 ] keep [ read-byte ] keep [ dec-byte ] keep [ $1 ] keep write-byte ] }
775 { "INC-(RR)" [ [ $1 ] keep [ read-byte ] keep [ inc-byte ] keep [ $1 ] keep write-byte ] }
776 { "JP-NN" [ [ cpu-pc ] keep [ read-word ] keep set-cpu-pc ] }
777 { "JP-F|FF,NN" [ [ $1 ] keep swap [ [ next-word ] keep [ set-cpu-pc ] keep [ cpu-cycles ] keep swap 5 + swap set-cpu-cycles ] [ [ cpu-pc 2 + ] keep set-cpu-pc ] if ] }
778 { "JP-(RR)" [ [ $1 ] keep set-cpu-pc ] }
779 { "CALL-NN" [ (emulate-CALL) ] }
780 { "CALL-F|FF,NN" [ [ $1 ] keep swap [ 7 over inc-cycles (emulate-CALL) ] [ [ cpu-pc 2 + ] keep set-cpu-pc ] if ] }
781 { "LD-RR,NN" [ [ next-word ] keep $2 ] }
782 { "LD-RR,RR" [ [ $3 ] keep $2 ] }
783 { "LD-R,N" [ [ next-byte ] keep $2 ] }
784 { "LD-(RR),N" [ [ next-byte ] keep [ $1 ] keep write-byte ] }
785 { "LD-(RR),R" [ [ $3 ] keep [ $1 ] keep write-byte ] }
786 { "LD-R,R" [ [ $3 ] keep $2 ] }
787 { "LD-R,(RR)" [ [ $3 ] keep [ read-byte ] keep $2 ] }
788 { "LD-(NN),RR" [ [ $1 ] keep [ next-word ] keep write-word ] }
789 { "LD-(NN),R" [ [ $1 ] keep [ next-word ] keep write-byte ] }
790 { "LD-RR,(NN)" [ [ next-word ] keep [ read-word ] keep $2 ] }
791 { "LD-R,(NN)" [ [ next-word ] keep [ read-byte ] keep $2 ] }
792 { "OUT-(N),R" [ [ $1 ] keep [ next-byte ] keep write-port ] }
793 { "IN-R,(N)" [ [ next-byte ] keep [ read-port ] keep set-cpu-a ] }
794 { "EX-(RR),RR" [ [ $1 ] keep [ read-word ] keep [ $3 ] keep [ $1 ] keep [ write-word ] keep $4 ] }
795 { "EX-RR,RR" [ [ $1 ] keep [ $3 ] keep [ $2 ] keep $4 ] }
798 : 8-bit-registers ( -- parser )
799 #! A parser for 8-bit registers. On a successfull parse the
800 #! parse tree contains a vector. The first item in the vector
801 #! is the getter word for that register with stack effect
802 #! ( cpu -- value ). The second item is the setter word with
803 #! stack effect ( value cpu -- ).
810 "L" token <|> [ register-lookup ] <@ ;
813 #! A parser for 16-bit flags.
821 "M" token <|> [ flag-lookup ] <@ ;
824 #! A parser for 16-bit registers. On a successfull parse the
825 #! parse tree contains a vector. The first item in the vector
826 #! is the getter word for that register with stack effect
827 #! ( cpu -- value ). The second item is the setter word with
828 #! stack effect ( value cpu -- ).
833 "SP" token <|> [ register-lookup ] <@ ;
835 : all-registers ( -- parser )
836 #! Return a parser that can parse the format
837 #! for 8 bit or 16 bit registers.
838 8-bit-registers 16-bit-registers <|> ;
840 : indirect ( parser -- parser )
841 #! Given a parser, return a parser which parses the original
842 #! wrapped in brackets, representing an indirect reference.
843 #! eg. BC -> (BC). The value of the original parser is left in
845 "(" token swap &> ")" token <& ;
847 : generate-instruction ( vector string -- quot )
848 #! Generate the quotation for an instruction, given the instruction in
849 #! the 'string' and a vector containing the arguments for that instruction.
850 patterns at replace-patterns ;
852 : simple-instruction ( token -- parser )
853 #! Return a parser for then instruction identified by the token.
854 #! The parser return parses the token only and expects no additional
855 #! arguments to the instruction.
856 token [ [ { } clone , , \ generate-instruction , ] [ ] make ] <@ ;
858 : complex-instruction ( type token -- parser )
859 #! Return a parser for an instruction identified by the token.
860 #! The instruction is expected to take additional arguments by
861 #! being combined with other parsers. Then 'type' is used for a lookup
862 #! in a pattern hashtable to return the instruction quotation pattern.
863 token swap [ nip [ , \ generate-instruction , ] [ ] make ] curry <@ ;
865 : NOP-instruction ( -- parser )
866 "NOP" simple-instruction ;
868 : RET-NN-instruction ( -- parser )
869 "RET-NN" "RET" complex-instruction
871 just [ { } clone swap curry ] <@ ;
873 : RST-0-instruction ( -- parser )
874 "RST-0" "RST" complex-instruction
876 just [ { } clone swap curry ] <@ ;
878 : RST-8-instruction ( -- parser )
879 "RST-8" "RST" complex-instruction
881 just [ { } clone swap curry ] <@ ;
883 : RST-10H-instruction ( -- parser )
884 "RST-10H" "RST" complex-instruction
886 just [ { } clone swap curry ] <@ ;
888 : RST-18H-instruction ( -- parser )
889 "RST-18H" "RST" complex-instruction
891 just [ { } clone swap curry ] <@ ;
893 : RST-20H-instruction ( -- parser )
894 "RST-20H" "RST" complex-instruction
896 just [ { } clone swap curry ] <@ ;
898 : RST-28H-instruction ( -- parser )
899 "RST-28H" "RST" complex-instruction
901 just [ { } clone swap curry ] <@ ;
903 : RST-30H-instruction ( -- parser )
904 "RST-30H" "RST" complex-instruction
906 just [ { } clone swap curry ] <@ ;
908 : RST-38H-instruction ( -- parser )
909 "RST-38H" "RST" complex-instruction
911 just [ { } clone swap curry ] <@ ;
913 : JP-NN-instruction ( -- parser )
914 "JP-NN" "JP" complex-instruction
916 just [ { } clone swap curry ] <@ ;
918 : JP-F|FF,NN-instruction ( -- parser )
919 "JP-F|FF,NN" "JP" complex-instruction
922 just [ first2 swap curry ] <@ ;
924 : JP-(RR)-instruction ( -- parser )
925 "JP-(RR)" "JP" complex-instruction
926 16-bit-registers indirect sp <&>
927 just [ first2 swap curry ] <@ ;
929 : CALL-NN-instruction ( -- parser )
930 "CALL-NN" "CALL" complex-instruction
932 just [ { } clone swap curry ] <@ ;
934 : CALL-F|FF,NN-instruction ( -- parser )
935 "CALL-F|FF,NN" "CALL" complex-instruction
938 just [ first2 swap curry ] <@ ;
940 : RLCA-instruction ( -- parser )
941 "RLCA" simple-instruction ;
943 : RRCA-instruction ( -- parser )
944 "RRCA" simple-instruction ;
946 : HALT-instruction ( -- parser )
947 "HALT" simple-instruction ;
949 : DI-instruction ( -- parser )
950 "DI" simple-instruction ;
952 : EI-instruction ( -- parser )
953 "EI" simple-instruction ;
955 : CPL-instruction ( -- parser )
956 "CPL" simple-instruction ;
958 : CCF-instruction ( -- parser )
959 "CCF" simple-instruction ;
961 : SCF-instruction ( -- parser )
962 "SCF" simple-instruction ;
964 : DAA-instruction ( -- parser )
965 "DAA" simple-instruction ;
967 : RLA-instruction ( -- parser )
968 "RLA" simple-instruction ;
970 : RRA-instruction ( -- parser )
971 "RRA" simple-instruction ;
973 : DEC-R-instruction ( -- parser )
974 "DEC-R" "DEC" complex-instruction 8-bit-registers sp <&>
975 just [ first2 swap curry ] <@ ;
977 : DEC-RR-instruction ( -- parser )
978 "DEC-RR" "DEC" complex-instruction 16-bit-registers sp <&>
979 just [ first2 swap curry ] <@ ;
981 : DEC-(RR)-instruction ( -- parser )
982 "DEC-(RR)" "DEC" complex-instruction
983 16-bit-registers indirect sp <&>
984 just [ first2 swap curry ] <@ ;
986 : POP-RR-instruction ( -- parser )
987 "POP-RR" "POP" complex-instruction all-registers sp <&>
988 just [ first2 swap curry ] <@ ;
990 : PUSH-RR-instruction ( -- parser )
991 "PUSH-RR" "PUSH" complex-instruction all-registers sp <&>
992 just [ first2 swap curry ] <@ ;
994 : INC-R-instruction ( -- parser )
995 "INC-R" "INC" complex-instruction 8-bit-registers sp <&>
996 just [ first2 swap curry ] <@ ;
998 : INC-RR-instruction ( -- parser )
999 "INC-RR" "INC" complex-instruction 16-bit-registers sp <&>
1000 just [ first2 swap curry ] <@ ;
1002 : INC-(RR)-instruction ( -- parser )
1003 "INC-(RR)" "INC" complex-instruction
1004 all-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1006 : RET-F|FF-instruction ( -- parser )
1007 "RET-F|FF" "RET" complex-instruction all-flags sp <&>
1008 just [ first2 swap curry ] <@ ;
1010 : AND-N-instruction ( -- parser )
1011 "AND-N" "AND" complex-instruction
1013 just [ { } clone swap curry ] <@ ;
1015 : AND-R-instruction ( -- parser )
1016 "AND-R" "AND" complex-instruction
1017 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1019 : AND-(RR)-instruction ( -- parser )
1020 "AND-(RR)" "AND" complex-instruction
1021 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1023 : XOR-N-instruction ( -- parser )
1024 "XOR-N" "XOR" complex-instruction
1026 just [ { } clone swap curry ] <@ ;
1028 : XOR-R-instruction ( -- parser )
1029 "XOR-R" "XOR" complex-instruction
1030 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1032 : XOR-(RR)-instruction ( -- parser )
1033 "XOR-(RR)" "XOR" complex-instruction
1034 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1036 : OR-N-instruction ( -- parser )
1037 "OR-N" "OR" complex-instruction
1039 just [ { } clone swap curry ] <@ ;
1041 : OR-R-instruction ( -- parser )
1042 "OR-R" "OR" complex-instruction
1043 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1045 : OR-(RR)-instruction ( -- parser )
1046 "OR-(RR)" "OR" complex-instruction
1047 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1049 : CP-N-instruction ( -- parser )
1050 "CP-N" "CP" complex-instruction
1052 just [ { } clone swap curry ] <@ ;
1054 : CP-R-instruction ( -- parser )
1055 "CP-R" "CP" complex-instruction
1056 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1058 : CP-(RR)-instruction ( -- parser )
1059 "CP-(RR)" "CP" complex-instruction
1060 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1062 : ADC-R,N-instruction ( -- parser )
1063 "ADC-R,N" "ADC" complex-instruction
1064 8-bit-registers sp <&>
1066 just [ first2 swap curry ] <@ ;
1068 : ADC-R,R-instruction ( -- parser )
1069 "ADC-R,R" "ADC" complex-instruction
1070 8-bit-registers sp <&>
1073 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1075 : ADC-R,(RR)-instruction ( -- parser )
1076 "ADC-R,(RR)" "ADC" complex-instruction
1077 8-bit-registers sp <&>
1079 16-bit-registers indirect <&>
1080 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1082 : SBC-R,N-instruction ( -- parser )
1083 "SBC-R,N" "SBC" complex-instruction
1084 8-bit-registers sp <&>
1086 just [ first2 swap curry ] <@ ;
1088 : SBC-R,R-instruction ( -- parser )
1089 "SBC-R,R" "SBC" complex-instruction
1090 8-bit-registers sp <&>
1093 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1095 : SBC-R,(RR)-instruction ( -- parser )
1096 "SBC-R,(RR)" "SBC" complex-instruction
1097 8-bit-registers sp <&>
1099 16-bit-registers indirect <&>
1100 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1102 : SUB-R-instruction ( -- parser )
1103 "SUB-R" "SUB" complex-instruction
1104 8-bit-registers sp <&>
1105 just [ first2 swap curry ] <@ ;
1107 : SUB-(RR)-instruction ( -- parser )
1108 "SUB-(RR)" "SUB" complex-instruction
1109 16-bit-registers indirect sp <&>
1110 just [ first2 swap curry ] <@ ;
1112 : SUB-N-instruction ( -- parser )
1113 "SUB-N" "SUB" complex-instruction
1115 just [ { } clone swap curry ] <@ ;
1117 : ADD-R,N-instruction ( -- parser )
1118 "ADD-R,N" "ADD" complex-instruction
1119 8-bit-registers sp <&>
1121 just [ first2 swap curry ] <@ ;
1123 : ADD-R,R-instruction ( -- parser )
1124 "ADD-R,R" "ADD" complex-instruction
1125 8-bit-registers sp <&>
1128 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1130 : ADD-RR,RR-instruction ( -- parser )
1131 "ADD-RR,RR" "ADD" complex-instruction
1132 16-bit-registers sp <&>
1134 16-bit-registers <&>
1135 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1137 : ADD-R,(RR)-instruction ( -- parser )
1138 "ADD-R,(RR)" "ADD" complex-instruction
1139 8-bit-registers sp <&>
1141 16-bit-registers indirect <&>
1142 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1144 : LD-RR,NN-instruction
1146 "LD-RR,NN" "LD" complex-instruction
1147 16-bit-registers sp <&>
1149 just [ first2 swap curry ] <@ ;
1151 : LD-R,N-instruction
1153 "LD-R,N" "LD" complex-instruction
1154 8-bit-registers sp <&>
1156 just [ first2 swap curry ] <@ ;
1158 : LD-(RR),N-instruction
1159 "LD-(RR),N" "LD" complex-instruction
1160 16-bit-registers indirect sp <&>
1162 just [ first2 swap curry ] <@ ;
1164 : LD-(RR),R-instruction
1166 "LD-(RR),R" "LD" complex-instruction
1167 16-bit-registers indirect sp <&>
1170 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1172 : LD-R,R-instruction
1173 "LD-R,R" "LD" complex-instruction
1174 8-bit-registers sp <&>
1177 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1179 : LD-RR,RR-instruction
1180 "LD-RR,RR" "LD" complex-instruction
1181 16-bit-registers sp <&>
1183 16-bit-registers <&>
1184 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1186 : LD-R,(RR)-instruction
1187 "LD-R,(RR)" "LD" complex-instruction
1188 8-bit-registers sp <&>
1190 16-bit-registers indirect <&>
1191 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1193 : LD-(NN),RR-instruction
1194 "LD-(NN),RR" "LD" complex-instruction
1195 "nn" token indirect sp <&
1197 16-bit-registers <&>
1198 just [ first2 swap curry ] <@ ;
1200 : LD-(NN),R-instruction
1201 "LD-(NN),R" "LD" complex-instruction
1202 "nn" token indirect sp <&
1205 just [ first2 swap curry ] <@ ;
1207 : LD-RR,(NN)-instruction
1208 "LD-RR,(NN)" "LD" complex-instruction
1209 16-bit-registers sp <&>
1211 "nn" token indirect <&
1212 just [ first2 swap curry ] <@ ;
1214 : LD-R,(NN)-instruction
1215 "LD-R,(NN)" "LD" complex-instruction
1216 8-bit-registers sp <&>
1218 "nn" token indirect <&
1219 just [ first2 swap curry ] <@ ;
1221 : OUT-(N),R-instruction
1222 "OUT-(N),R" "OUT" complex-instruction
1223 "n" token indirect sp <&
1226 just [ first2 swap curry ] <@ ;
1228 : IN-R,(N)-instruction
1229 "IN-R,(N)" "IN" complex-instruction
1230 8-bit-registers sp <&>
1232 "n" token indirect <&
1233 just [ first2 swap curry ] <@ ;
1235 : EX-(RR),RR-instruction
1236 "EX-(RR),RR" "EX" complex-instruction
1237 16-bit-registers indirect sp <&>
1239 16-bit-registers <&>
1240 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1242 : EX-RR,RR-instruction
1243 "EX-RR,RR" "EX" complex-instruction
1244 16-bit-registers sp <&>
1246 16-bit-registers <&>
1247 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1249 : 8080-generator-parser
1251 RST-0-instruction <|>
1252 RST-8-instruction <|>
1253 RST-10H-instruction <|>
1254 RST-18H-instruction <|>
1255 RST-20H-instruction <|>
1256 RST-28H-instruction <|>
1257 RST-30H-instruction <|>
1258 RST-38H-instruction <|>
1259 JP-F|FF,NN-instruction <|>
1260 JP-NN-instruction <|>
1261 JP-(RR)-instruction <|>
1262 CALL-F|FF,NN-instruction <|>
1263 CALL-NN-instruction <|>
1270 RLCA-instruction <|>
1271 RRCA-instruction <|>
1272 HALT-instruction <|>
1275 AND-N-instruction <|>
1276 AND-R-instruction <|>
1277 AND-(RR)-instruction <|>
1278 XOR-N-instruction <|>
1279 XOR-R-instruction <|>
1280 XOR-(RR)-instruction <|>
1281 OR-N-instruction <|>
1282 OR-R-instruction <|>
1283 OR-(RR)-instruction <|>
1284 CP-N-instruction <|>
1285 CP-R-instruction <|>
1286 CP-(RR)-instruction <|>
1287 DEC-RR-instruction <|>
1288 DEC-R-instruction <|>
1289 DEC-(RR)-instruction <|>
1290 POP-RR-instruction <|>
1291 PUSH-RR-instruction <|>
1292 INC-RR-instruction <|>
1293 INC-R-instruction <|>
1294 INC-(RR)-instruction <|>
1295 LD-RR,NN-instruction <|>
1296 LD-R,N-instruction <|>
1297 LD-R,R-instruction <|>
1298 LD-RR,RR-instruction <|>
1299 LD-(RR),N-instruction <|>
1300 LD-(RR),R-instruction <|>
1301 LD-R,(RR)-instruction <|>
1302 LD-(NN),RR-instruction <|>
1303 LD-(NN),R-instruction <|>
1304 LD-RR,(NN)-instruction <|>
1305 LD-R,(NN)-instruction <|>
1306 ADC-R,N-instruction <|>
1307 ADC-R,R-instruction <|>
1308 ADC-R,(RR)-instruction <|>
1309 ADD-R,N-instruction <|>
1310 ADD-R,R-instruction <|>
1311 ADD-RR,RR-instruction <|>
1312 ADD-R,(RR)-instruction <|>
1313 SBC-R,N-instruction <|>
1314 SBC-R,R-instruction <|>
1315 SBC-R,(RR)-instruction <|>
1316 SUB-R-instruction <|>
1317 SUB-(RR)-instruction <|>
1318 SUB-N-instruction <|>
1319 RET-F|FF-instruction <|>
1320 RET-NN-instruction <|>
1321 OUT-(N),R-instruction <|>
1322 IN-R,(N)-instruction <|>
1323 EX-(RR),RR-instruction <|>
1324 EX-RR,RR-instruction <|>
1327 : instruction-quotations ( string -- emulate-quot )
1328 #! Given an instruction string, return the emulation quotation for
1329 #! it. This will later be expanded to produce the disassembly and
1330 #! assembly quotations.
1331 8080-generator-parser some parse call ;
1333 SYMBOL: last-instruction
1336 : parse-instructions ( list -- emulate-quot )
1337 #! Process the list of strings, which should make
1338 #! up an 8080 instruction, and output a quotation
1339 #! that would implement that instruction.
1340 dup " " join instruction-quotations
1341 >r "_" join [ "emulate-" % % ] "" make create-in dup last-instruction global set-at
1342 r> define-compound ;
1344 : INSTRUCTION: ";" parse-tokens parse-instructions ; parsing
1347 #! Set the number of cycles for the last instruction that was defined.
1348 scan string>number last-opcode global at instruction-cycles set-nth ; parsing
1351 #! Set the opcode number for the last instruction that was defined.
1352 last-instruction global at 1quotation scan 16 base>
1353 dup last-opcode global set-at instructions set-nth ; parsing
1355 INSTRUCTION: NOP ; opcode 00 cycles 04
1356 INSTRUCTION: LD BC,nn ; opcode 01 cycles 10
1357 INSTRUCTION: LD (BC),A ; opcode 02 cycles 07
1358 INSTRUCTION: INC BC ; opcode 03 cycles 06
1359 INSTRUCTION: INC B ; opcode 04 cycles 05
1360 INSTRUCTION: DEC B ; opcode 05 cycles 05
1361 INSTRUCTION: LD B,n ; opcode 06 cycles 07
1362 INSTRUCTION: RLCA ; opcode 07 cycles 04
1363 ! INSTRUCTION: NOP ; opcode 08 cycles 04
1364 INSTRUCTION: ADD HL,BC ; opcode 09 cycles 11
1365 INSTRUCTION: LD A,(BC) ; opcode 0A cycles 07
1366 INSTRUCTION: DEC BC ; opcode 0B cycles 06
1367 INSTRUCTION: INC C ; opcode 0C cycles 05
1368 INSTRUCTION: DEC C ; opcode 0D cycles 05
1369 INSTRUCTION: LD C,n ; opcode 0E cycles 07
1370 INSTRUCTION: RRCA ; opcode 0F cycles 04
1371 INSTRUCTION: LD DE,nn ; opcode 11 cycles 10
1372 INSTRUCTION: LD (DE),A ; opcode 12 cycles 07
1373 INSTRUCTION: INC DE ; opcode 13 cycles 06
1374 INSTRUCTION: INC D ; opcode 14 cycles 05
1375 INSTRUCTION: DEC D ; opcode 15 cycles 05
1376 INSTRUCTION: LD D,n ; opcode 16 cycles 07
1377 INSTRUCTION: RLA ; opcode 17 cycles 04
1378 INSTRUCTION: ADD HL,DE ; opcode 19 cycles 11
1379 INSTRUCTION: LD A,(DE) ; opcode 1A cycles 07
1380 INSTRUCTION: DEC DE ; opcode 1B cycles 06
1381 INSTRUCTION: INC E ; opcode 1C cycles 05
1382 INSTRUCTION: DEC E ; opcode 1D cycles 05
1383 INSTRUCTION: LD E,n ; opcode 1E cycles 07
1384 INSTRUCTION: RRA ; opcode 1F cycles 04
1385 INSTRUCTION: LD HL,nn ; opcode 21 cycles 10
1386 INSTRUCTION: LD (nn),HL ; opcode 22 cycles 16
1387 INSTRUCTION: INC HL ; opcode 23 cycles 06
1388 INSTRUCTION: INC H ; opcode 24 cycles 05
1389 INSTRUCTION: DEC H ; opcode 25 cycles 05
1390 INSTRUCTION: LD H,n ; opcode 26 cycles 07
1391 INSTRUCTION: DAA ; opcode 27 cycles 04
1392 INSTRUCTION: ADD HL,HL ; opcode 29 cycles 11
1393 INSTRUCTION: LD HL,(nn) ; opcode 2A cycles 16
1394 INSTRUCTION: DEC HL ; opcode 2B cycles 06
1395 INSTRUCTION: INC L ; opcode 2C cycles 05
1396 INSTRUCTION: DEC L ; opcode 2D cycles 05
1397 INSTRUCTION: LD L,n ; opcode 2E cycles 07
1398 INSTRUCTION: CPL ; opcode 2F cycles 04
1399 INSTRUCTION: LD SP,nn ; opcode 31 cycles 10
1400 INSTRUCTION: LD (nn),A ; opcode 32 cycles 13
1401 INSTRUCTION: INC SP ; opcode 33 cycles 06
1402 INSTRUCTION: INC (HL) ; opcode 34 cycles 10
1403 INSTRUCTION: DEC (HL) ; opcode 35 cycles 10
1404 INSTRUCTION: LD (HL),n ; opcode 36 cycles 10
1405 INSTRUCTION: SCF ; opcode 37 cycles 04
1406 INSTRUCTION: ADD HL,SP ; opcode 39 cycles 11
1407 INSTRUCTION: LD A,(nn) ; opcode 3A cycles 13
1408 INSTRUCTION: DEC SP ; opcode 3B cycles 06
1409 INSTRUCTION: INC A ; opcode 3C cycles 05
1410 INSTRUCTION: DEC A ; opcode 3D cycles 05
1411 INSTRUCTION: LD A,n ; opcode 3E cycles 07
1412 INSTRUCTION: CCF ; opcode 3F cycles 04
1413 INSTRUCTION: LD B,B ; opcode 40 cycles 05
1414 INSTRUCTION: LD B,C ; opcode 41 cycles 05
1415 INSTRUCTION: LD B,D ; opcode 42 cycles 05
1416 INSTRUCTION: LD B,E ; opcode 43 cycles 05
1417 INSTRUCTION: LD B,H ; opcode 44 cycles 05
1418 INSTRUCTION: LD B,L ; opcode 45 cycles 05
1419 INSTRUCTION: LD B,(HL) ; opcode 46 cycles 07
1420 INSTRUCTION: LD B,A ; opcode 47 cycles 05
1421 INSTRUCTION: LD C,B ; opcode 48 cycles 05
1422 INSTRUCTION: LD C,C ; opcode 49 cycles 05
1423 INSTRUCTION: LD C,D ; opcode 4A cycles 05
1424 INSTRUCTION: LD C,E ; opcode 4B cycles 05
1425 INSTRUCTION: LD C,H ; opcode 4C cycles 05
1426 INSTRUCTION: LD C,L ; opcode 4D cycles 05
1427 INSTRUCTION: LD C,(HL) ; opcode 4E cycles 07
1428 INSTRUCTION: LD C,A ; opcode 4F cycles 05
1429 INSTRUCTION: LD D,B ; opcode 50 cycles 05
1430 INSTRUCTION: LD D,C ; opcode 51 cycles 05
1431 INSTRUCTION: LD D,D ; opcode 52 cycles 05
1432 INSTRUCTION: LD D,E ; opcode 53 cycles 05
1433 INSTRUCTION: LD D,H ; opcode 54 cycles 05
1434 INSTRUCTION: LD D,L ; opcode 55 cycles 05
1435 INSTRUCTION: LD D,(HL) ; opcode 56 cycles 07
1436 INSTRUCTION: LD D,A ; opcode 57 cycles 05
1437 INSTRUCTION: LD E,B ; opcode 58 cycles 05
1438 INSTRUCTION: LD E,C ; opcode 59 cycles 05
1439 INSTRUCTION: LD E,D ; opcode 5A cycles 05
1440 INSTRUCTION: LD E,E ; opcode 5B cycles 05
1441 INSTRUCTION: LD E,H ; opcode 5C cycles 05
1442 INSTRUCTION: LD E,L ; opcode 5D cycles 05
1443 INSTRUCTION: LD E,(HL) ; opcode 5E cycles 07
1444 INSTRUCTION: LD E,A ; opcode 5F cycles 05
1445 INSTRUCTION: LD H,B ; opcode 60 cycles 05
1446 INSTRUCTION: LD H,C ; opcode 61 cycles 05
1447 INSTRUCTION: LD H,D ; opcode 62 cycles 05
1448 INSTRUCTION: LD H,E ; opcode 63 cycles 05
1449 INSTRUCTION: LD H,H ; opcode 64 cycles 05
1450 INSTRUCTION: LD H,L ; opcode 65 cycles 05
1451 INSTRUCTION: LD H,(HL) ; opcode 66 cycles 07
1452 INSTRUCTION: LD H,A ; opcode 67 cycles 05
1453 INSTRUCTION: LD L,B ; opcode 68 cycles 05
1454 INSTRUCTION: LD L,C ; opcode 69 cycles 05
1455 INSTRUCTION: LD L,D ; opcode 6A cycles 05
1456 INSTRUCTION: LD L,E ; opcode 6B cycles 05
1457 INSTRUCTION: LD L,H ; opcode 6C cycles 05
1458 INSTRUCTION: LD L,L ; opcode 6D cycles 05
1459 INSTRUCTION: LD L,(HL) ; opcode 6E cycles 07
1460 INSTRUCTION: LD L,A ; opcode 6F cycles 05
1461 INSTRUCTION: LD (HL),B ; opcode 70 cycles 07
1462 INSTRUCTION: LD (HL),C ; opcode 71 cycles 07
1463 INSTRUCTION: LD (HL),D ; opcode 72 cycles 07
1464 INSTRUCTION: LD (HL),E ; opcode 73 cycles 07
1465 INSTRUCTION: LD (HL),H ; opcode 74 cycles 07
1466 INSTRUCTION: LD (HL),L ; opcode 75 cycles 07
1467 INSTRUCTION: HALT ; opcode 76 cycles 07
1468 INSTRUCTION: LD (HL),A ; opcode 77 cycles 07
1469 INSTRUCTION: LD A,B ; opcode 78 cycles 05
1470 INSTRUCTION: LD A,C ; opcode 79 cycles 05
1471 INSTRUCTION: LD A,D ; opcode 7A cycles 05
1472 INSTRUCTION: LD A,E ; opcode 7B cycles 05
1473 INSTRUCTION: LD A,H ; opcode 7C cycles 05
1474 INSTRUCTION: LD A,L ; opcode 7D cycles 05
1475 INSTRUCTION: LD A,(HL) ; opcode 7E cycles 07
1476 INSTRUCTION: LD A,A ; opcode 7F cycles 05
1477 INSTRUCTION: ADD A,B ; opcode 80 cycles 04
1478 INSTRUCTION: ADD A,C ; opcode 81 cycles 04
1479 INSTRUCTION: ADD A,D ; opcode 82 cycles 04
1480 INSTRUCTION: ADD A,E ; opcode 83 cycles 04
1481 INSTRUCTION: ADD A,H ; opcode 84 cycles 04
1482 INSTRUCTION: ADD A,L ; opcode 85 cycles 04
1483 INSTRUCTION: ADD A,(HL) ; opcode 86 cycles 07
1484 INSTRUCTION: ADD A,A ; opcode 87 cycles 04
1485 INSTRUCTION: ADC A,B ; opcode 88 cycles 04
1486 INSTRUCTION: ADC A,C ; opcode 89 cycles 04
1487 INSTRUCTION: ADC A,D ; opcode 8A cycles 04
1488 INSTRUCTION: ADC A,E ; opcode 8B cycles 04
1489 INSTRUCTION: ADC A,H ; opcode 8C cycles 04
1490 INSTRUCTION: ADC A,L ; opcode 8D cycles 04
1491 INSTRUCTION: ADC A,(HL) ; opcode 8E cycles 07
1492 INSTRUCTION: ADC A,A ; opcode 8F cycles 04
1493 INSTRUCTION: SUB B ; opcode 90 cycles 04
1494 INSTRUCTION: SUB C ; opcode 91 cycles 04
1495 INSTRUCTION: SUB D ; opcode 92 cycles 04
1496 INSTRUCTION: SUB E ; opcode 93 cycles 04
1497 INSTRUCTION: SUB H ; opcode 94 cycles 04
1498 INSTRUCTION: SUB L ; opcode 95 cycles 04
1499 INSTRUCTION: SUB (HL) ; opcode 96 cycles 07
1500 INSTRUCTION: SUB A ; opcode 97 cycles 04
1501 INSTRUCTION: SBC A,B ; opcode 98 cycles 04
1502 INSTRUCTION: SBC A,C ; opcode 99 cycles 04
1503 INSTRUCTION: SBC A,D ; opcode 9A cycles 04
1504 INSTRUCTION: SBC A,E ; opcode 9B cycles 04
1505 INSTRUCTION: SBC A,H ; opcode 9C cycles 04
1506 INSTRUCTION: SBC A,L ; opcode 9D cycles 04
1507 INSTRUCTION: SBC A,(HL) ; opcode 9E cycles 07
1508 INSTRUCTION: SBC A,A ; opcode 9F cycles 04
1509 INSTRUCTION: AND B ; opcode A0 cycles 04
1510 INSTRUCTION: AND C ; opcode A1 cycles 04
1511 INSTRUCTION: AND D ; opcode A2 cycles 04
1512 INSTRUCTION: AND E ; opcode A3 cycles 04
1513 INSTRUCTION: AND H ; opcode A4 cycles 04
1514 INSTRUCTION: AND L ; opcode A5 cycles 04
1515 INSTRUCTION: AND (HL) ; opcode A6 cycles 07
1516 INSTRUCTION: AND A ; opcode A7 cycles 04
1517 INSTRUCTION: XOR B ; opcode A8 cycles 04
1518 INSTRUCTION: XOR C ; opcode A9 cycles 04
1519 INSTRUCTION: XOR D ; opcode AA cycles 04
1520 INSTRUCTION: XOR E ; opcode AB cycles 04
1521 INSTRUCTION: XOR H ; opcode AC cycles 04
1522 INSTRUCTION: XOR L ; opcode AD cycles 04
1523 INSTRUCTION: XOR (HL) ; opcode AE cycles 07
1524 INSTRUCTION: XOR A ; opcode AF cycles 04
1525 INSTRUCTION: OR B ; opcode B0 cycles 04
1526 INSTRUCTION: OR C ; opcode B1 cycles 04
1527 INSTRUCTION: OR D ; opcode B2 cycles 04
1528 INSTRUCTION: OR E ; opcode B3 cycles 04
1529 INSTRUCTION: OR H ; opcode B4 cycles 04
1530 INSTRUCTION: OR L ; opcode B5 cycles 04
1531 INSTRUCTION: OR (HL) ; opcode B6 cycles 07
1532 INSTRUCTION: OR A ; opcode B7 cycles 04
1533 INSTRUCTION: CP B ; opcode B8 cycles 04
1534 INSTRUCTION: CP C ; opcode B9 cycles 04
1535 INSTRUCTION: CP D ; opcode BA cycles 04
1536 INSTRUCTION: CP E ; opcode BB cycles 04
1537 INSTRUCTION: CP H ; opcode BC cycles 04
1538 INSTRUCTION: CP L ; opcode BD cycles 04
1539 INSTRUCTION: CP (HL) ; opcode BE cycles 07
1540 INSTRUCTION: CP A ; opcode BF cycles 04
1541 INSTRUCTION: RET NZ ; opcode C0 cycles 05
1542 INSTRUCTION: POP BC ; opcode C1 cycles 10
1543 INSTRUCTION: JP NZ,nn ; opcode C2 cycles 10
1544 INSTRUCTION: JP nn ; opcode C3 cycles 10
1545 INSTRUCTION: CALL NZ,nn ; opcode C4 cycles 11
1546 INSTRUCTION: PUSH BC ; opcode C5 cycles 11
1547 INSTRUCTION: ADD A,n ; opcode C6 cycles 07
1548 INSTRUCTION: RST 0 ; opcode C7 cycles 11
1549 INSTRUCTION: RET Z ; opcode C8 cycles 05
1550 INSTRUCTION: RET nn ; opcode C9 cycles 10
1551 INSTRUCTION: JP Z,nn ; opcode CA cycles 10
1552 INSTRUCTION: CALL Z,nn ; opcode CC cycles 11
1553 INSTRUCTION: CALL nn ; opcode CD cycles 17
1554 INSTRUCTION: ADC A,n ; opcode CE cycles 07
1555 INSTRUCTION: RST 8 ; opcode CF cycles 11
1556 INSTRUCTION: RET NC ; opcode D0 cycles 05
1557 INSTRUCTION: POP DE ; opcode D1 cycles 10
1558 INSTRUCTION: JP NC,nn ; opcode D2 cycles 10
1559 INSTRUCTION: OUT (n),A ; opcode D3 cycles 10
1560 INSTRUCTION: CALL NC,nn ; opcode D4 cycles 11
1561 INSTRUCTION: PUSH DE ; opcode D5 cycles 11
1562 INSTRUCTION: SUB n ; opcode D6 cycles 07
1563 INSTRUCTION: RST 10H ; opcode D7 cycles 11
1564 INSTRUCTION: RET C ; opcode D8 cycles 05
1565 INSTRUCTION: JP C,nn ; opcode DA cycles 10
1566 INSTRUCTION: IN A,(n) ; opcode DB cycles 10
1567 INSTRUCTION: CALL C,nn ; opcode DC cycles 11
1568 INSTRUCTION: SBC A,n ; opcode DE cycles 07
1569 INSTRUCTION: RST 18H ; opcode DF cycles 11
1570 INSTRUCTION: RET PO ; opcode E0 cycles 05
1571 INSTRUCTION: POP HL ; opcode E1 cycles 10
1572 INSTRUCTION: JP PO,nn ; opcode E2 cycles 10
1573 INSTRUCTION: EX (SP),HL ; opcode E3 cycles 04
1574 INSTRUCTION: CALL PO,nn ; opcode E4 cycles 11
1575 INSTRUCTION: PUSH HL ; opcode E5 cycles 11
1576 INSTRUCTION: AND n ; opcode E6 cycles 07
1577 INSTRUCTION: RST 20H ; opcode E7 cycles 11
1578 INSTRUCTION: RET PE ; opcode E8 cycles 05
1579 INSTRUCTION: JP (HL) ; opcode E9 cycles 04
1580 INSTRUCTION: JP PE,nn ; opcode EA cycles 10
1581 INSTRUCTION: EX DE,HL ; opcode EB cycles 04
1582 INSTRUCTION: CALL PE,nn ; opcode EC cycles 11
1583 INSTRUCTION: XOR n ; opcode EE cycles 07
1584 INSTRUCTION: RST 28H ; opcode EF cycles 11
1585 INSTRUCTION: RET P ; opcode F0 cycles 05
1586 INSTRUCTION: POP AF ; opcode F1 cycles 10
1587 INSTRUCTION: JP P,nn ; opcode F2 cycles 10
1588 INSTRUCTION: DI ; opcode F3 cycles 04
1589 INSTRUCTION: CALL P,nn ; opcode F4 cycles 11
1590 INSTRUCTION: PUSH AF ; opcode F5 cycles 11
1591 INSTRUCTION: OR n ; opcode F6 cycles 07
1592 INSTRUCTION: RST 30H ; opcode F7 cycles 11
1593 INSTRUCTION: RET M ; opcode F8 cycles 05
1594 INSTRUCTION: LD SP,HL ; opcode F9 cycles 06
1595 INSTRUCTION: JP M,nn ; opcode FA cycles 10
1596 INSTRUCTION: EI ; opcode FB cycles 04
1597 INSTRUCTION: CALL M,nn ; opcode FC cycles 11
1598 INSTRUCTION: CP n ; opcode FE cycles 07
1599 INSTRUCTION: RST 38H ; opcode FF cycles 11
1601 ! : each-8bit ( n quot -- )
1603 ! pick over -1 * shift 1 bitand pick call
1606 ! : >ppm ( cpu filename -- cpu )
1607 ! #! Dump the current screen image to a ppm image file with the given name.
1614 ! over 32 * over + HEX: 2400 + ! cpu h w addr
1615 ! >r pick r> swap cpu-ram nth [
1627 test-cpu [ 1000000 run-n ] time ;