1 ! Copyright (C) 2006 Chris Double.
2 ! See http://factorcode.org/license.txt for BSD license.
4 USING: kernel math sequences words arrays io
5 io.files namespaces math.parser kernel.private
6 assocs quotations parser parser-combinators tools.time ;
9 TUPLE: cpu b c d e f h l a pc sp halted? last-interrupt cycles ram ;
11 GENERIC: reset ( cpu -- )
12 GENERIC: update-video ( value addr cpu -- )
13 GENERIC: read-port ( port cpu -- byte )
14 GENERIC: write-port ( value port cpu -- )
16 M: cpu update-video ( value addr cpu -- )
19 M: cpu read-port ( port cpu -- byte )
20 #! Read a byte from the hardware port. 'port' should
24 M: cpu write-port ( value port cpu -- )
25 #! Write a byte to the hardware port, where 'port' is
29 : carry-flag HEX: 01 ; inline
30 : parity-flag HEX: 04 ; inline
31 : half-carry-flag HEX: 10 ; inline
32 : interrupt-flag HEX: 20 ; inline
33 : zero-flag HEX: 40 ; inline
34 : sign-flag HEX: 80 ; inline
36 : >word< ( word -- byte byte )
37 #! Explode a word into its two 8 bit values.
38 dup HEX: FF bitand swap -8 shift HEX: FF bitand swap ;
40 : cpu-af ( cpu -- word )
41 #! Return the 16-bit pseudo register AF.
42 [ cpu-a 8 shift ] keep cpu-f bitor ;
44 : set-cpu-af ( value cpu -- )
45 #! Set the value of the 16-bit pseudo register AF
46 >r >word< r> tuck set-cpu-f set-cpu-a ;
48 : cpu-bc ( cpu -- word )
49 #! Return the 16-bit pseudo register BC.
50 [ cpu-b 8 shift ] keep cpu-c bitor ;
52 : set-cpu-bc ( value cpu -- )
53 #! Set the value of the 16-bit pseudo register BC
54 >r >word< r> tuck set-cpu-c set-cpu-b ;
56 : cpu-de ( cpu -- word )
57 #! Return the 16-bit pseudo register DE.
58 [ cpu-d 8 shift ] keep cpu-e bitor ;
60 : set-cpu-de ( value cpu -- )
61 #! Set the value of the 16-bit pseudo register DE
62 >r >word< r> tuck set-cpu-e set-cpu-d ;
64 : cpu-hl ( cpu -- word )
65 #! Return the 16-bit pseudo register HL.
66 [ cpu-h 8 shift ] keep cpu-l bitor ;
68 : set-cpu-hl ( value cpu -- )
69 #! Set the value of the 16-bit pseudo register HL
70 >r >word< r> tuck set-cpu-l set-cpu-h ;
72 : flag-set? ( flag cpu -- bool )
73 cpu-f bitand 0 = not ;
75 : flag-clear? ( flag cpu -- bool )
78 : flag-nz? ( cpu -- bool )
80 cpu-f zero-flag bitand 0 = ;
82 : flag-z? ( cpu -- bool )
84 cpu-f zero-flag bitand 0 = not ;
86 : flag-nc? ( cpu -- bool )
88 cpu-f carry-flag bitand 0 = ;
90 : flag-c? ( cpu -- bool )
92 cpu-f carry-flag bitand 0 = not ;
94 : flag-po? ( cpu -- bool )
96 cpu-f parity-flag bitand 0 = ;
98 : flag-pe? ( cpu -- bool )
100 cpu-f parity-flag bitand 0 = not ;
102 : flag-p? ( cpu -- bool )
104 cpu-f sign-flag bitand 0 = ;
106 : flag-m? ( cpu -- bool )
108 cpu-f sign-flag bitand 0 = not ;
110 : read-byte ( addr cpu -- byte )
111 #! Read one byte from memory at the specified address.
112 #! The address is 16-bit, but if a value greater than
113 #! 0xFFFF is provided then return a default value.
120 : read-word ( addr cpu -- word )
121 #! Read a 16-bit word from memory at the specified address.
122 #! The address is 16-bit, but if a value greater than
123 #! 0xFFFF is provided then return a default value.
124 [ read-byte ] 2keep >r 1 + r> read-byte 8 shift bitor ;
126 : next-byte ( cpu -- byte )
127 #! Return the value of the byte at PC, and increment PC.
133 : next-word ( cpu -- word )
134 #! Return the value of the word at PC, and increment PC.
141 : write-byte ( value addr cpu -- )
142 #! Write a byte to the specified memory address.
143 over dup HEX: 2000 < swap HEX: FFFF > or [
151 : write-word ( value addr cpu -- )
152 #! Write a 16-bit word to the specified memory address.
153 >r >r >word< r> r> [ write-byte ] 2keep >r 1 + r> write-byte ;
155 : cpu-a-bitand ( quot cpu -- )
157 [ cpu-a swap call bitand ] keep set-cpu-a ; inline
159 : cpu-a-bitor ( quot cpu -- )
161 [ cpu-a swap call bitor ] keep set-cpu-a ; inline
163 : cpu-a-bitxor ( quot cpu -- )
165 [ cpu-a swap call bitxor ] keep set-cpu-a ; inline
167 : cpu-a-bitxor= ( value cpu -- )
169 [ cpu-a bitxor ] keep set-cpu-a ;
171 : cpu-f-bitand ( quot cpu -- )
173 [ cpu-f swap call bitand ] keep set-cpu-f ; inline
175 : cpu-f-bitor ( quot cpu -- )
177 [ cpu-f swap call bitor ] keep set-cpu-f ; inline
179 : cpu-f-bitxor ( quot cpu -- )
181 [ cpu-f swap call bitxor ] keep set-cpu-f ; inline
183 : cpu-f-bitor= ( value cpu -- )
185 [ cpu-f bitor ] keep set-cpu-f ;
187 : cpu-f-bitand= ( value cpu -- )
189 [ cpu-f bitand ] keep set-cpu-f ;
191 : cpu-f-bitxor= ( value cpu -- )
193 [ cpu-f bitxor ] keep set-cpu-f ;
195 : set-flag ( cpu flag -- )
198 : clear-flag ( cpu flag -- )
199 bitnot HEX: FF bitand swap cpu-f-bitand= ;
201 : update-zero-flag ( result cpu -- )
202 #! If the result of an instruction has the value 0, this
203 #! flag is set, otherwise it is reset.
204 swap HEX: FF bitand 0 = [ zero-flag set-flag ] [ zero-flag clear-flag ] if ;
206 : update-sign-flag ( result cpu -- )
207 #! If the most significant bit of the result
208 #! has the value 1 then the flag is set, otherwise
210 swap HEX: 80 bitand 0 = [ sign-flag clear-flag ] [ sign-flag set-flag ] if ;
212 : update-parity-flag ( result cpu -- )
213 #! If the modulo 2 sum of the bits of the result
214 #! is 0, (ie. if the result has even parity) this flag
215 #! is set, otherwise it is reset.
216 swap HEX: FF bitand 2 mod 0 = [ parity-flag set-flag ] [ parity-flag clear-flag ] if ;
218 : update-carry-flag ( result cpu -- )
219 #! If the instruction resulted in a carry (from addition)
220 #! or a borrow (from subtraction or a comparison) out of the
221 #! higher order bit, this flag is set, otherwise it is reset.
222 swap dup HEX: 100 >= swap 0 < or [ carry-flag set-flag ] [ carry-flag clear-flag ] if ;
224 : update-half-carry-flag ( original change-by result cpu -- )
225 #! If the instruction caused a carry out of bit 3 and into bit 4 of the
226 #! resulting value, the half carry flag is set, otherwise it is reset.
227 #! The 'original' is the original value of the register being changed.
228 #! 'change-by' is the amount it is being added or decremented by.
229 #! 'result' is the result of that change.
230 >r bitxor bitxor HEX: 10 bitand 0 = not r>
231 swap [ half-carry-flag set-flag ] [ half-carry-flag clear-flag ] if ;
233 : update-flags ( result cpu -- )
234 2dup update-carry-flag
235 2dup update-parity-flag
236 2dup update-sign-flag
239 : update-flags-no-carry ( result cpu -- )
240 2dup update-parity-flag
241 2dup update-sign-flag
244 : add-byte ( lhs rhs cpu -- result )
246 >r 2dup + r> ! lhs rhs result cpu
247 [ update-flags ] 2keep
248 [ update-half-carry-flag ] 2keep
249 drop HEX: FF bitand ;
251 : add-carry ( change-by result cpu -- change-by result )
252 #! Add the effect of the carry flag to the result
253 flag-c? [ 1 + >r 1 + r> ] when ;
255 : add-byte-with-carry ( lhs rhs cpu -- result )
256 #! Add rhs to lhs plus carry.
257 >r 2dup + r> ! lhs rhs result cpu
259 [ update-flags ] 2keep
260 [ update-half-carry-flag ] 2keep
261 drop HEX: FF bitand ;
263 : sub-carry ( change-by result cpu -- change-by result )
264 #! Subtract the effect of the carry flag from the result
265 flag-c? [ 1 - >r 1 - r> ] when ;
267 : sub-byte ( lhs rhs cpu -- result )
268 #! Subtract rhs from lhs
270 [ update-flags ] 2keep
271 [ update-half-carry-flag ] 2keep
272 drop HEX: FF bitand ;
274 : sub-byte-with-carry ( lhs rhs cpu -- result )
275 #! Subtract rhs from lhs and take carry into account
278 [ update-flags ] 2keep
279 [ update-half-carry-flag ] 2keep
280 drop HEX: FF bitand ;
282 : inc-byte ( byte cpu -- result )
283 #! Increment byte by one. Note that carry flag is not affected
284 #! by this operation.
285 >r 1 2dup + r> ! lhs rhs result cpu
286 [ update-flags-no-carry ] 2keep
287 [ update-half-carry-flag ] 2keep
288 drop HEX: FF bitand ;
290 : dec-byte ( byte cpu -- result )
291 #! Decrement byte by one. Note that carry flag is not affected
292 #! by this operation.
293 >r 1 2dup - r> ! lhs rhs result cpu
294 [ update-flags-no-carry ] 2keep
295 [ update-half-carry-flag ] 2keep
296 drop HEX: FF bitand ;
298 : inc-word ( w cpu -- w )
299 #! Increment word by one. Note that no flags are modified.
300 drop 1 + HEX: FFFF bitand ;
302 : dec-word ( w cpu -- w )
303 #! Decrement word by one. Note that no flags are modified.
304 drop 1 - HEX: FFFF bitand ;
306 : add-word ( lhs rhs cpu -- result )
307 #! Add rhs to lhs. Note that only the carry flag is modified
308 #! and only if there is a carry out of the double precision add.
309 >r + r> over HEX: FFFF > [ carry-flag set-flag ] [ drop ] if HEX: FFFF bitand ;
311 : bit3or ( lhs rhs -- 0|1 )
312 #! bitor bit 3 of the two numbers on the stack
313 BIN: 00001000 bitand -3 shift >r
314 BIN: 00001000 bitand -3 shift r>
317 : and-byte ( lhs rhs cpu -- result )
318 #! Logically and rhs to lhs. The carry flag is cleared and
319 #! the half carry is set to the ORing of bits 3 of the operands.
320 [ drop bit3or ] 3keep ! bit3or lhs rhs cpu
321 >r bitand r> [ update-flags ] 2keep
322 [ carry-flag clear-flag ] keep
323 rot 0 = [ half-carry-flag set-flag ] [ half-carry-flag clear-flag ] if
326 : xor-byte ( lhs rhs cpu -- result )
327 #! Logically xor rhs to lhs. The carry and half-carry flags are cleared.
328 >r bitxor r> [ update-flags ] 2keep
329 [ half-carry-flag carry-flag bitor clear-flag ] keep
330 drop HEX: FF bitand ;
332 : or-byte ( lhs rhs cpu -- result )
333 #! Logically or rhs to lhs. The carry and half-carry flags are cleared.
334 >r bitor r> [ update-flags ] 2keep
335 [ half-carry-flag carry-flag bitor clear-flag ] keep
336 drop HEX: FF bitand ;
338 : flags ( seq -- seq )
339 [ 0 [ execute bitor ] reduce ] map ;
341 : decrement-sp ( n cpu -- )
342 #! Decrement the stackpointer by n.
344 >r swap - r> set-cpu-sp ;
347 #! Save the value of the PC on the stack.
348 [ cpu-pc ] keep ! pc cpu
349 [ cpu-sp ] keep ! pc sp cpu
353 #! Push the value of the PC on the stack.
357 : pop-pc ( cpu -- pc )
358 #! Pop the value of the PC off the stack.
361 -2 swap decrement-sp ;
363 : push-sp ( value cpu -- )
364 [ 2 swap decrement-sp ] keep
368 : pop-sp ( cpu -- value )
371 -2 swap decrement-sp ;
373 : call-sub ( addr cpu -- )
374 #! Call the address as a subroutine.
376 >r HEX: FFFF bitand r> set-cpu-pc ;
378 : ret-from-sub ( cpu -- )
379 [ pop-pc ] keep set-cpu-pc ;
381 : interrupt ( number cpu -- )
382 #! Perform a hardware interrupt
383 ! "***Interrupt: " write over 16 >base print
384 dup cpu-f interrupt-flag bitand 0 = not [
391 : inc-cycles ( n cpu -- )
392 #! Increment the number of cpu cycles
393 [ cpu-cycles + ] keep set-cpu-cycles ;
395 : instruction-cycles ( -- vector )
396 #! Return a 256 element vector containing the cycles for
397 #! each opcode in the 8080 instruction set.
399 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
400 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
401 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
402 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
403 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
404 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
405 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
406 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f } ;
408 : instructions ( -- vector )
409 #! Return a 256 element vector containing the emulation words for
410 #! each opcode in the 8080 instruction set.
412 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
413 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
414 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
415 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
416 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
417 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
418 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f
419 f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f f } ;
421 : not-implemented ( <cpu> -- )
424 instructions length [
425 dup instructions nth [
428 [ not-implemented ] swap instructions set-nth
432 M: cpu reset ( cpu -- )
433 #! Reset the CPU to its poweron state
434 [ 0 swap set-cpu-b ] keep
435 [ 0 swap set-cpu-c ] keep
436 [ 0 swap set-cpu-d ] keep
437 [ 0 swap set-cpu-e ] keep
438 [ 0 swap set-cpu-h ] keep
439 [ 0 swap set-cpu-l ] keep
440 [ 0 swap set-cpu-a ] keep
441 [ 0 swap set-cpu-f ] keep
442 [ 0 swap set-cpu-pc ] keep
443 [ HEX: F000 swap set-cpu-sp ] keep
444 [ HEX: FFFF 0 <array> swap set-cpu-ram ] keep
445 [ f swap set-cpu-halted? ] keep
446 [ HEX: 10 swap set-cpu-last-interrupt ] keep
447 0 swap set-cpu-cycles ;
449 : <cpu> ( -- cpu ) cpu construct-empty dup reset ;
451 : (load-rom) ( n ram -- )
453 -rot [ set-nth ] 2keep >r 1 + r> (load-rom)
458 #! Reads the ROM from stdin and stores it in ROM from
460 : load-rom ( filename cpu -- )
461 #! Load the contents of the file into ROM.
462 #! (address 0x0000-0x1FFF).
463 cpu-ram swap <file-reader> [
469 : rom-dir ( -- string )
470 rom-root get [ home "roms" path+ dup exists? [ drop f ] unless ] unless* ;
472 : load-rom* ( seq cpu -- )
473 #! 'seq' is an array of arrays. Each array contains
474 #! an address and filename of a ROM file. The ROM
475 #! file will be loaded at the specified address. This
476 #! file path shoul dbe relative to the '/roms' resource path.
479 swap first2 rom-dir swap path+ <file-reader> [
486 "Set 'rom-root' to the path containing the root of the 8080 ROM files." throw
489 : read-instruction ( cpu -- word )
490 #! Read the next instruction from the cpu's program
491 #! counter, and increment the program counter.
492 [ cpu-pc ] keep ! pc cpu
493 [ over 1 + swap set-cpu-pc ] keep
496 : get-cycles ( n -- opcode )
497 #! Returns the cycles for the given instruction value.
498 #! If the opcode is not defined throw an error.
499 dup instruction-cycles nth [
502 [ "Undefined 8080 opcode: " % number>string % ] "" make throw
505 : process-interrupts ( cpu -- )
506 #! Process any hardware interrupts
511 [ >r 16667 - r> set-cpu-cycles ] keep
512 dup cpu-last-interrupt HEX: 10 = [
513 HEX: 08 over set-cpu-last-interrupt HEX: 08 swap interrupt
515 HEX: 10 over set-cpu-last-interrupt HEX: 10 swap interrupt
520 #! Run a single 8080 instruction
521 [ read-instruction ] keep ! n cpu
522 over get-cycles over inc-cycles
523 [ swap instructions dispatch ] keep
524 [ cpu-pc HEX: FFFF bitand ] keep
528 : peek-instruction ( cpu -- word )
529 #! Return the next instruction from the cpu's program
530 #! counter, but don't increment the counter.
531 [ cpu-pc ] keep read-byte instructions nth first ;
534 [ " PC: " write cpu-pc 16 >base 4 CHAR: \s pad-left write ] keep
535 [ " B: " write cpu-b 16 >base 2 CHAR: \s pad-left write ] keep
536 [ " C: " write cpu-c 16 >base 2 CHAR: \s pad-left write ] keep
537 [ " D: " write cpu-d 16 >base 2 CHAR: \s pad-left write ] keep
538 [ " E: " write cpu-e 16 >base 2 CHAR: \s pad-left write ] keep
539 [ " F: " write cpu-f 16 >base 2 CHAR: \s pad-left write ] keep
540 [ " H: " write cpu-h 16 >base 2 CHAR: \s pad-left write ] keep
541 [ " L: " write cpu-l 16 >base 2 CHAR: \s pad-left write ] keep
542 [ " A: " write cpu-a 16 >base 2 CHAR: \s pad-left write ] keep
543 [ " SP: " write cpu-sp 16 >base 4 CHAR: \s pad-left write ] keep
544 [ " cycles: " write cpu-cycles number>string 5 CHAR: \s pad-left write ] keep
545 [ " " write peek-instruction word-name write " " write ] keep
549 [ " PC: " write cpu-pc 16 >base 4 CHAR: \s pad-left write ] keep
550 [ " B: " write cpu-b 16 >base 2 CHAR: \s pad-left write ] keep
551 [ " C: " write cpu-c 16 >base 2 CHAR: \s pad-left write ] keep
552 [ " D: " write cpu-d 16 >base 2 CHAR: \s pad-left write ] keep
553 [ " E: " write cpu-e 16 >base 2 CHAR: \s pad-left write ] keep
554 [ " F: " write cpu-f 16 >base 2 CHAR: \s pad-left write ] keep
555 [ " H: " write cpu-h 16 >base 2 CHAR: \s pad-left write ] keep
556 [ " L: " write cpu-l 16 >base 2 CHAR: \s pad-left write ] keep
557 [ " A: " write cpu-a 16 >base 2 CHAR: \s pad-left write ] keep
558 [ " SP: " write cpu-sp 16 >base 4 CHAR: \s pad-left write ] keep
559 [ " cycles: " write cpu-cycles number>string 5 CHAR: \s pad-left write ] keep
562 : test-step ( cpu -- cpu )
563 [ step ] keep dup cpu. ;
565 : test-cpu ( -- cpu )
566 <cpu> "invaders.rom" over load-rom dup cpu. ;
569 test-cpu swap [ test-step ] times ;
571 : run-n ( cpu n -- cpu )
574 : register-lookup ( string -- vector )
575 #! Given a string containing a register name, return a vector
576 #! where the 1st item is the getter and the 2nd is the setter
577 #! for that register.
579 { "A" { cpu-a set-cpu-a } }
580 { "B" { cpu-b set-cpu-b } }
581 { "C" { cpu-c set-cpu-c } }
582 { "D" { cpu-d set-cpu-d } }
583 { "E" { cpu-e set-cpu-e } }
584 { "H" { cpu-h set-cpu-h } }
585 { "L" { cpu-l set-cpu-l } }
586 { "AF" { cpu-af set-cpu-af } }
587 { "BC" { cpu-bc set-cpu-bc } }
588 { "DE" { cpu-de set-cpu-de } }
589 { "HL" { cpu-hl set-cpu-hl } }
590 { "SP" { cpu-sp set-cpu-sp } }
594 : flag-lookup ( string -- vector )
595 #! Given a string containing a flag name, return a vector
596 #! where the 1st item is a word that tests that flag.
598 { "NZ" { flag-nz? } }
599 { "NC" { flag-nc? } }
600 { "PO" { flag-po? } }
601 { "PE" { flag-pe? } }
613 : replace-patterns ( vector tree -- tree )
614 #! Copy the tree, replacing each occurence of
615 #! $1, $2, etc with the relevant item from the
617 dup quotation? over [ ] = not and [ ! vector tree
618 dup first swap 1 tail ! vector car cdr
619 >r dupd replace-patterns ! vector v R: cdr
620 swap r> replace-patterns >r 1quotation r> append
622 dup $1 = [ drop 0 over nth ] when
623 dup $2 = [ drop 1 over nth ] when
624 dup $3 = [ drop 2 over nth ] when
625 dup $4 = [ drop 3 over nth ] when
630 { 4 5 3 } [ 1 $2 [ $1 4 ] ] replace-patterns ;
632 : (emulate-RST) ( n cpu -- )
634 [ cpu-sp 2 - dup ] keep ! sp sp cpu
635 [ set-cpu-sp ] keep ! sp cpu
636 [ cpu-pc ] keep ! sp pc cpu
637 swapd [ write-word ] keep ! cpu
638 >r 8 * r> set-cpu-pc ;
640 : (emulate-CALL) ( cpu -- )
642 [ next-word HEX: FFFF bitand ] keep ! addr cpu
643 [ cpu-sp 2 - dup ] keep ! addr sp sp cpu
644 [ set-cpu-sp ] keep ! addr sp cpu
645 [ cpu-pc ] keep ! addr sp pc cpu
646 swapd [ write-word ] keep ! addr cpu
649 : (emulate-RLCA) ( cpu -- )
650 #! The content of the accumulator is rotated left
651 #! one position. The low order bit and the carry flag
652 #! are both set to the value shifd out of the high
653 #! order bit position. Only the carry flag is affected.
654 [ cpu-a -7 shift ] keep
655 over 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
656 [ cpu-a 1 shift HEX: FF bitand ] keep
657 >r bitor r> set-cpu-a ;
659 : (emulate-RRCA) ( cpu -- )
660 #! The content of the accumulator is rotated right
661 #! one position. The high order bit and the carry flag
662 #! are both set to the value shifd out of the low
663 #! order bit position. Only the carry flag is affected.
664 [ cpu-a 1 bitand 7 shift ] keep
665 over 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
666 [ cpu-a 254 bitand -1 shift ] keep
667 >r bitor r> set-cpu-a ;
669 : (emulate-RLA) ( cpu -- )
670 #! The content of the accumulator is rotated left
671 #! one position through the carry flag. The low
672 #! order bit is set equal to the carry flag and
673 #! the carry flag is set to the value shifd out
674 #! of the high order bit. Only the carry flag is
676 [ carry-flag swap flag-set? [ 1 ] [ 0 ] if ] keep
677 [ cpu-a 127 bitand 7 shift ] keep
678 dup cpu-a 128 bitand 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
679 >r bitor r> set-cpu-a ;
681 : (emulate-RRA) ( cpu -- )
682 #! The content of the accumulator is rotated right
683 #! one position through the carry flag. The high order
684 #! bit is set to the carry flag and the carry flag is
685 #! set to the value shifd out of the low order bit.
686 #! Only the carry flag is affected.
687 [ carry-flag swap flag-set? [ BIN: 10000000 ] [ 0 ] if ] keep
688 [ cpu-a 254 bitand -1 shift ] keep
689 dup cpu-a 1 bitand 0 = [ dup carry-flag clear-flag ] [ dup carry-flag set-flag ] if
690 >r bitor r> set-cpu-a ;
692 : (emulate-CPL) ( cpu -- )
693 #! The contents of the accumulator are complemented
694 #! (zero bits become one, one bits becomes zero).
695 #! No flags are affected.
696 HEX: FF swap cpu-a-bitxor= ;
698 : (emulate-DAA) ( cpu -- )
699 #! The eight bit number in the accumulator is
700 #! adjusted to form two four-bit binary-coded-decimal
703 dup half-carry-flag swap flag-set? swap
704 cpu-a BIN: 1111 bitand 9 > or [ 6 ] [ 0 ] if
707 [ update-flags ] 2keep
708 [ swap HEX: FF bitand swap set-cpu-a ] keep
710 dup carry-flag swap flag-set? swap
711 cpu-a -4 shift BIN: 1111 bitand 9 > or [ 96 ] [ 0 ] if
714 [ update-flags ] 2keep
715 swap HEX: FF bitand swap set-cpu-a ;
717 : patterns ( -- hashtable )
718 #! table of code quotation patterns for each type of instruction.
721 { "RET-NN" [ ret-from-sub ] }
722 { "RST-0" [ 0 swap (emulate-RST) ] }
723 { "RST-8" [ 8 swap (emulate-RST) ] }
724 { "RST-10H" [ HEX: 10 swap (emulate-RST) ] }
725 { "RST-18H" [ HEX: 18 swap (emulate-RST) ] }
726 { "RST-20H" [ HEX: 20 swap (emulate-RST) ] }
727 { "RST-28H" [ HEX: 28 swap (emulate-RST) ] }
728 { "RST-30H" [ HEX: 30 swap (emulate-RST) ] }
729 { "RST-38H" [ HEX: 38 swap (emulate-RST) ] }
730 { "RET-F|FF" [ dup $1 [ 6 over inc-cycles ret-from-sub ] [ drop ] if ] }
731 { "CP-N" [ [ cpu-a ] keep [ next-byte ] keep sub-byte drop ] }
732 { "CP-R" [ [ cpu-a ] keep [ $1 ] keep sub-byte drop ] }
733 { "CP-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep sub-byte drop ] }
734 { "OR-N" [ [ cpu-a ] keep [ next-byte ] keep [ or-byte ] keep set-cpu-a ] }
735 { "OR-R" [ [ cpu-a ] keep [ $1 ] keep [ or-byte ] keep set-cpu-a ] }
736 { "OR-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ or-byte ] keep set-cpu-a ] }
737 { "XOR-N" [ [ cpu-a ] keep [ next-byte ] keep [ xor-byte ] keep set-cpu-a ] }
738 { "XOR-R" [ [ cpu-a ] keep [ $1 ] keep [ xor-byte ] keep set-cpu-a ] }
739 { "XOR-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ xor-byte ] keep set-cpu-a ] }
740 { "AND-N" [ [ cpu-a ] keep [ next-byte ] keep [ and-byte ] keep set-cpu-a ] }
741 { "AND-R" [ [ cpu-a ] keep [ $1 ] keep [ and-byte ] keep set-cpu-a ] }
742 { "AND-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ and-byte ] keep set-cpu-a ] }
743 { "ADC-R,N" [ [ $1 ] keep [ next-byte ] keep [ add-byte-with-carry ] keep $2 ] }
744 { "ADC-R,R" [ [ $1 ] keep [ $3 ] keep [ add-byte-with-carry ] keep $2 ] }
745 { "ADC-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ add-byte-with-carry ] keep $2 ] }
746 { "ADD-R,N" [ [ $1 ] keep [ next-byte ] keep [ add-byte ] keep $2 ] }
747 { "ADD-R,R" [ [ $1 ] keep [ $3 ] keep [ add-byte ] keep $2 ] }
748 { "ADD-RR,RR" [ [ $1 ] keep [ $3 ] keep [ add-word ] keep $2 ] }
749 { "ADD-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ add-byte ] keep $2 ] }
750 { "SBC-R,N" [ [ $1 ] keep [ next-byte ] keep [ sub-byte-with-carry ] keep $2 ] }
751 { "SBC-R,R" [ [ $1 ] keep [ $3 ] keep [ sub-byte-with-carry ] keep $2 ] }
752 { "SBC-R,(RR)" [ [ $1 ] keep [ $3 ] keep [ read-byte ] keep [ sub-byte-with-carry ] keep $2 ] }
753 { "SUB-R" [ [ cpu-a ] keep [ $1 ] keep [ sub-byte ] keep set-cpu-a ] }
754 { "SUB-(RR)" [ [ cpu-a ] keep [ $1 ] keep [ read-byte ] keep [ sub-byte ] keep set-cpu-a ] }
755 { "SUB-N" [ [ cpu-a ] keep [ next-byte ] keep [ sub-byte ] keep set-cpu-a ] }
756 { "CPL" [ (emulate-CPL) ] }
757 { "DAA" [ (emulate-DAA) ] }
758 { "RLA" [ (emulate-RLA) ] }
759 { "RRA" [ (emulate-RRA) ] }
760 { "CCF" [ carry-flag swap cpu-f-bitxor= ] }
761 { "SCF" [ carry-flag swap cpu-f-bitor= ] }
762 { "RLCA" [ (emulate-RLCA) ] }
763 { "RRCA" [ (emulate-RRCA) ] }
765 { "DI" [ [ 255 interrupt-flag - ] swap cpu-f-bitand ] }
766 { "EI" [ [ interrupt-flag ] swap cpu-f-bitor ] }
767 { "POP-RR" [ [ pop-sp ] keep $2 ] }
768 { "PUSH-RR" [ [ $1 ] keep push-sp ] }
769 { "INC-R" [ [ $1 ] keep [ inc-byte ] keep $2 ] }
770 { "DEC-R" [ [ $1 ] keep [ dec-byte ] keep $2 ] }
771 { "INC-RR" [ [ $1 ] keep [ inc-word ] keep $2 ] }
772 { "DEC-RR" [ [ $1 ] keep [ dec-word ] keep $2 ] }
773 { "DEC-(RR)" [ [ $1 ] keep [ read-byte ] keep [ dec-byte ] keep [ $1 ] keep write-byte ] }
774 { "INC-(RR)" [ [ $1 ] keep [ read-byte ] keep [ inc-byte ] keep [ $1 ] keep write-byte ] }
775 { "JP-NN" [ [ cpu-pc ] keep [ read-word ] keep set-cpu-pc ] }
776 { "JP-F|FF,NN" [ [ $1 ] keep swap [ [ next-word ] keep [ set-cpu-pc ] keep [ cpu-cycles ] keep swap 5 + swap set-cpu-cycles ] [ [ cpu-pc 2 + ] keep set-cpu-pc ] if ] }
777 { "JP-(RR)" [ [ $1 ] keep set-cpu-pc ] }
778 { "CALL-NN" [ (emulate-CALL) ] }
779 { "CALL-F|FF,NN" [ [ $1 ] keep swap [ 7 over inc-cycles (emulate-CALL) ] [ [ cpu-pc 2 + ] keep set-cpu-pc ] if ] }
780 { "LD-RR,NN" [ [ next-word ] keep $2 ] }
781 { "LD-RR,RR" [ [ $3 ] keep $2 ] }
782 { "LD-R,N" [ [ next-byte ] keep $2 ] }
783 { "LD-(RR),N" [ [ next-byte ] keep [ $1 ] keep write-byte ] }
784 { "LD-(RR),R" [ [ $3 ] keep [ $1 ] keep write-byte ] }
785 { "LD-R,R" [ [ $3 ] keep $2 ] }
786 { "LD-R,(RR)" [ [ $3 ] keep [ read-byte ] keep $2 ] }
787 { "LD-(NN),RR" [ [ $1 ] keep [ next-word ] keep write-word ] }
788 { "LD-(NN),R" [ [ $1 ] keep [ next-word ] keep write-byte ] }
789 { "LD-RR,(NN)" [ [ next-word ] keep [ read-word ] keep $2 ] }
790 { "LD-R,(NN)" [ [ next-word ] keep [ read-byte ] keep $2 ] }
791 { "OUT-(N),R" [ [ $1 ] keep [ next-byte ] keep write-port ] }
792 { "IN-R,(N)" [ [ next-byte ] keep [ read-port ] keep set-cpu-a ] }
793 { "EX-(RR),RR" [ [ $1 ] keep [ read-word ] keep [ $3 ] keep [ $1 ] keep [ write-word ] keep $4 ] }
794 { "EX-RR,RR" [ [ $1 ] keep [ $3 ] keep [ $2 ] keep $4 ] }
797 : 8-bit-registers ( -- parser )
798 #! A parser for 8-bit registers. On a successfull parse the
799 #! parse tree contains a vector. The first item in the vector
800 #! is the getter word for that register with stack effect
801 #! ( cpu -- value ). The second item is the setter word with
802 #! stack effect ( value cpu -- ).
809 "L" token <|> [ register-lookup ] <@ ;
812 #! A parser for 16-bit flags.
820 "M" token <|> [ flag-lookup ] <@ ;
823 #! A parser for 16-bit registers. On a successfull parse the
824 #! parse tree contains a vector. The first item in the vector
825 #! is the getter word for that register with stack effect
826 #! ( cpu -- value ). The second item is the setter word with
827 #! stack effect ( value cpu -- ).
832 "SP" token <|> [ register-lookup ] <@ ;
834 : all-registers ( -- parser )
835 #! Return a parser that can parse the format
836 #! for 8 bit or 16 bit registers.
837 8-bit-registers 16-bit-registers <|> ;
839 : indirect ( parser -- parser )
840 #! Given a parser, return a parser which parses the original
841 #! wrapped in brackets, representing an indirect reference.
842 #! eg. BC -> (BC). The value of the original parser is left in
844 "(" token swap &> ")" token <& ;
846 : generate-instruction ( vector string -- quot )
847 #! Generate the quotation for an instruction, given the instruction in
848 #! the 'string' and a vector containing the arguments for that instruction.
849 patterns at replace-patterns ;
851 : simple-instruction ( token -- parser )
852 #! Return a parser for then instruction identified by the token.
853 #! The parser return parses the token only and expects no additional
854 #! arguments to the instruction.
855 token [ [ { } clone , , \ generate-instruction , ] [ ] make ] <@ ;
857 : complex-instruction ( type token -- parser )
858 #! Return a parser for an instruction identified by the token.
859 #! The instruction is expected to take additional arguments by
860 #! being combined with other parsers. Then 'type' is used for a lookup
861 #! in a pattern hashtable to return the instruction quotation pattern.
862 token swap [ nip [ , \ generate-instruction , ] [ ] make ] curry <@ ;
864 : NOP-instruction ( -- parser )
865 "NOP" simple-instruction ;
867 : RET-NN-instruction ( -- parser )
868 "RET-NN" "RET" complex-instruction
870 just [ { } clone swap curry ] <@ ;
872 : RST-0-instruction ( -- parser )
873 "RST-0" "RST" complex-instruction
875 just [ { } clone swap curry ] <@ ;
877 : RST-8-instruction ( -- parser )
878 "RST-8" "RST" complex-instruction
880 just [ { } clone swap curry ] <@ ;
882 : RST-10H-instruction ( -- parser )
883 "RST-10H" "RST" complex-instruction
885 just [ { } clone swap curry ] <@ ;
887 : RST-18H-instruction ( -- parser )
888 "RST-18H" "RST" complex-instruction
890 just [ { } clone swap curry ] <@ ;
892 : RST-20H-instruction ( -- parser )
893 "RST-20H" "RST" complex-instruction
895 just [ { } clone swap curry ] <@ ;
897 : RST-28H-instruction ( -- parser )
898 "RST-28H" "RST" complex-instruction
900 just [ { } clone swap curry ] <@ ;
902 : RST-30H-instruction ( -- parser )
903 "RST-30H" "RST" complex-instruction
905 just [ { } clone swap curry ] <@ ;
907 : RST-38H-instruction ( -- parser )
908 "RST-38H" "RST" complex-instruction
910 just [ { } clone swap curry ] <@ ;
912 : JP-NN-instruction ( -- parser )
913 "JP-NN" "JP" complex-instruction
915 just [ { } clone swap curry ] <@ ;
917 : JP-F|FF,NN-instruction ( -- parser )
918 "JP-F|FF,NN" "JP" complex-instruction
921 just [ first2 swap curry ] <@ ;
923 : JP-(RR)-instruction ( -- parser )
924 "JP-(RR)" "JP" complex-instruction
925 16-bit-registers indirect sp <&>
926 just [ first2 swap curry ] <@ ;
928 : CALL-NN-instruction ( -- parser )
929 "CALL-NN" "CALL" complex-instruction
931 just [ { } clone swap curry ] <@ ;
933 : CALL-F|FF,NN-instruction ( -- parser )
934 "CALL-F|FF,NN" "CALL" complex-instruction
937 just [ first2 swap curry ] <@ ;
939 : RLCA-instruction ( -- parser )
940 "RLCA" simple-instruction ;
942 : RRCA-instruction ( -- parser )
943 "RRCA" simple-instruction ;
945 : HALT-instruction ( -- parser )
946 "HALT" simple-instruction ;
948 : DI-instruction ( -- parser )
949 "DI" simple-instruction ;
951 : EI-instruction ( -- parser )
952 "EI" simple-instruction ;
954 : CPL-instruction ( -- parser )
955 "CPL" simple-instruction ;
957 : CCF-instruction ( -- parser )
958 "CCF" simple-instruction ;
960 : SCF-instruction ( -- parser )
961 "SCF" simple-instruction ;
963 : DAA-instruction ( -- parser )
964 "DAA" simple-instruction ;
966 : RLA-instruction ( -- parser )
967 "RLA" simple-instruction ;
969 : RRA-instruction ( -- parser )
970 "RRA" simple-instruction ;
972 : DEC-R-instruction ( -- parser )
973 "DEC-R" "DEC" complex-instruction 8-bit-registers sp <&>
974 just [ first2 swap curry ] <@ ;
976 : DEC-RR-instruction ( -- parser )
977 "DEC-RR" "DEC" complex-instruction 16-bit-registers sp <&>
978 just [ first2 swap curry ] <@ ;
980 : DEC-(RR)-instruction ( -- parser )
981 "DEC-(RR)" "DEC" complex-instruction
982 16-bit-registers indirect sp <&>
983 just [ first2 swap curry ] <@ ;
985 : POP-RR-instruction ( -- parser )
986 "POP-RR" "POP" complex-instruction all-registers sp <&>
987 just [ first2 swap curry ] <@ ;
989 : PUSH-RR-instruction ( -- parser )
990 "PUSH-RR" "PUSH" complex-instruction all-registers sp <&>
991 just [ first2 swap curry ] <@ ;
993 : INC-R-instruction ( -- parser )
994 "INC-R" "INC" complex-instruction 8-bit-registers sp <&>
995 just [ first2 swap curry ] <@ ;
997 : INC-RR-instruction ( -- parser )
998 "INC-RR" "INC" complex-instruction 16-bit-registers sp <&>
999 just [ first2 swap curry ] <@ ;
1001 : INC-(RR)-instruction ( -- parser )
1002 "INC-(RR)" "INC" complex-instruction
1003 all-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1005 : RET-F|FF-instruction ( -- parser )
1006 "RET-F|FF" "RET" complex-instruction all-flags sp <&>
1007 just [ first2 swap curry ] <@ ;
1009 : AND-N-instruction ( -- parser )
1010 "AND-N" "AND" complex-instruction
1012 just [ { } clone swap curry ] <@ ;
1014 : AND-R-instruction ( -- parser )
1015 "AND-R" "AND" complex-instruction
1016 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1018 : AND-(RR)-instruction ( -- parser )
1019 "AND-(RR)" "AND" complex-instruction
1020 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1022 : XOR-N-instruction ( -- parser )
1023 "XOR-N" "XOR" complex-instruction
1025 just [ { } clone swap curry ] <@ ;
1027 : XOR-R-instruction ( -- parser )
1028 "XOR-R" "XOR" complex-instruction
1029 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1031 : XOR-(RR)-instruction ( -- parser )
1032 "XOR-(RR)" "XOR" complex-instruction
1033 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1035 : OR-N-instruction ( -- parser )
1036 "OR-N" "OR" complex-instruction
1038 just [ { } clone swap curry ] <@ ;
1040 : OR-R-instruction ( -- parser )
1041 "OR-R" "OR" complex-instruction
1042 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1044 : OR-(RR)-instruction ( -- parser )
1045 "OR-(RR)" "OR" complex-instruction
1046 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1048 : CP-N-instruction ( -- parser )
1049 "CP-N" "CP" complex-instruction
1051 just [ { } clone swap curry ] <@ ;
1053 : CP-R-instruction ( -- parser )
1054 "CP-R" "CP" complex-instruction
1055 8-bit-registers sp <&> just [ first2 swap curry ] <@ ;
1057 : CP-(RR)-instruction ( -- parser )
1058 "CP-(RR)" "CP" complex-instruction
1059 16-bit-registers indirect sp <&> just [ first2 swap curry ] <@ ;
1061 : ADC-R,N-instruction ( -- parser )
1062 "ADC-R,N" "ADC" complex-instruction
1063 8-bit-registers sp <&>
1065 just [ first2 swap curry ] <@ ;
1067 : ADC-R,R-instruction ( -- parser )
1068 "ADC-R,R" "ADC" complex-instruction
1069 8-bit-registers sp <&>
1072 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1074 : ADC-R,(RR)-instruction ( -- parser )
1075 "ADC-R,(RR)" "ADC" complex-instruction
1076 8-bit-registers sp <&>
1078 16-bit-registers indirect <&>
1079 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1081 : SBC-R,N-instruction ( -- parser )
1082 "SBC-R,N" "SBC" complex-instruction
1083 8-bit-registers sp <&>
1085 just [ first2 swap curry ] <@ ;
1087 : SBC-R,R-instruction ( -- parser )
1088 "SBC-R,R" "SBC" complex-instruction
1089 8-bit-registers sp <&>
1092 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1094 : SBC-R,(RR)-instruction ( -- parser )
1095 "SBC-R,(RR)" "SBC" complex-instruction
1096 8-bit-registers sp <&>
1098 16-bit-registers indirect <&>
1099 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1101 : SUB-R-instruction ( -- parser )
1102 "SUB-R" "SUB" complex-instruction
1103 8-bit-registers sp <&>
1104 just [ first2 swap curry ] <@ ;
1106 : SUB-(RR)-instruction ( -- parser )
1107 "SUB-(RR)" "SUB" complex-instruction
1108 16-bit-registers indirect sp <&>
1109 just [ first2 swap curry ] <@ ;
1111 : SUB-N-instruction ( -- parser )
1112 "SUB-N" "SUB" complex-instruction
1114 just [ { } clone swap curry ] <@ ;
1116 : ADD-R,N-instruction ( -- parser )
1117 "ADD-R,N" "ADD" complex-instruction
1118 8-bit-registers sp <&>
1120 just [ first2 swap curry ] <@ ;
1122 : ADD-R,R-instruction ( -- parser )
1123 "ADD-R,R" "ADD" complex-instruction
1124 8-bit-registers sp <&>
1127 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1129 : ADD-RR,RR-instruction ( -- parser )
1130 "ADD-RR,RR" "ADD" complex-instruction
1131 16-bit-registers sp <&>
1133 16-bit-registers <&>
1134 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1136 : ADD-R,(RR)-instruction ( -- parser )
1137 "ADD-R,(RR)" "ADD" complex-instruction
1138 8-bit-registers sp <&>
1140 16-bit-registers indirect <&>
1141 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1143 : LD-RR,NN-instruction
1145 "LD-RR,NN" "LD" complex-instruction
1146 16-bit-registers sp <&>
1148 just [ first2 swap curry ] <@ ;
1150 : LD-R,N-instruction
1152 "LD-R,N" "LD" complex-instruction
1153 8-bit-registers sp <&>
1155 just [ first2 swap curry ] <@ ;
1157 : LD-(RR),N-instruction
1158 "LD-(RR),N" "LD" complex-instruction
1159 16-bit-registers indirect sp <&>
1161 just [ first2 swap curry ] <@ ;
1163 : LD-(RR),R-instruction
1165 "LD-(RR),R" "LD" complex-instruction
1166 16-bit-registers indirect sp <&>
1169 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1171 : LD-R,R-instruction
1172 "LD-R,R" "LD" complex-instruction
1173 8-bit-registers sp <&>
1176 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1178 : LD-RR,RR-instruction
1179 "LD-RR,RR" "LD" complex-instruction
1180 16-bit-registers sp <&>
1182 16-bit-registers <&>
1183 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1185 : LD-R,(RR)-instruction
1186 "LD-R,(RR)" "LD" complex-instruction
1187 8-bit-registers sp <&>
1189 16-bit-registers indirect <&>
1190 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1192 : LD-(NN),RR-instruction
1193 "LD-(NN),RR" "LD" complex-instruction
1194 "nn" token indirect sp <&
1196 16-bit-registers <&>
1197 just [ first2 swap curry ] <@ ;
1199 : LD-(NN),R-instruction
1200 "LD-(NN),R" "LD" complex-instruction
1201 "nn" token indirect sp <&
1204 just [ first2 swap curry ] <@ ;
1206 : LD-RR,(NN)-instruction
1207 "LD-RR,(NN)" "LD" complex-instruction
1208 16-bit-registers sp <&>
1210 "nn" token indirect <&
1211 just [ first2 swap curry ] <@ ;
1213 : LD-R,(NN)-instruction
1214 "LD-R,(NN)" "LD" complex-instruction
1215 8-bit-registers sp <&>
1217 "nn" token indirect <&
1218 just [ first2 swap curry ] <@ ;
1220 : OUT-(N),R-instruction
1221 "OUT-(N),R" "OUT" complex-instruction
1222 "n" token indirect sp <&
1225 just [ first2 swap curry ] <@ ;
1227 : IN-R,(N)-instruction
1228 "IN-R,(N)" "IN" complex-instruction
1229 8-bit-registers sp <&>
1231 "n" token indirect <&
1232 just [ first2 swap curry ] <@ ;
1234 : EX-(RR),RR-instruction
1235 "EX-(RR),RR" "EX" complex-instruction
1236 16-bit-registers indirect sp <&>
1238 16-bit-registers <&>
1239 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1241 : EX-RR,RR-instruction
1242 "EX-RR,RR" "EX" complex-instruction
1243 16-bit-registers sp <&>
1245 16-bit-registers <&>
1246 just [ first2 swap first2 swap >r swap append r> curry ] <@ ;
1248 : 8080-generator-parser
1250 RST-0-instruction <|>
1251 RST-8-instruction <|>
1252 RST-10H-instruction <|>
1253 RST-18H-instruction <|>
1254 RST-20H-instruction <|>
1255 RST-28H-instruction <|>
1256 RST-30H-instruction <|>
1257 RST-38H-instruction <|>
1258 JP-F|FF,NN-instruction <|>
1259 JP-NN-instruction <|>
1260 JP-(RR)-instruction <|>
1261 CALL-F|FF,NN-instruction <|>
1262 CALL-NN-instruction <|>
1269 RLCA-instruction <|>
1270 RRCA-instruction <|>
1271 HALT-instruction <|>
1274 AND-N-instruction <|>
1275 AND-R-instruction <|>
1276 AND-(RR)-instruction <|>
1277 XOR-N-instruction <|>
1278 XOR-R-instruction <|>
1279 XOR-(RR)-instruction <|>
1280 OR-N-instruction <|>
1281 OR-R-instruction <|>
1282 OR-(RR)-instruction <|>
1283 CP-N-instruction <|>
1284 CP-R-instruction <|>
1285 CP-(RR)-instruction <|>
1286 DEC-RR-instruction <|>
1287 DEC-R-instruction <|>
1288 DEC-(RR)-instruction <|>
1289 POP-RR-instruction <|>
1290 PUSH-RR-instruction <|>
1291 INC-RR-instruction <|>
1292 INC-R-instruction <|>
1293 INC-(RR)-instruction <|>
1294 LD-RR,NN-instruction <|>
1295 LD-R,N-instruction <|>
1296 LD-R,R-instruction <|>
1297 LD-RR,RR-instruction <|>
1298 LD-(RR),N-instruction <|>
1299 LD-(RR),R-instruction <|>
1300 LD-R,(RR)-instruction <|>
1301 LD-(NN),RR-instruction <|>
1302 LD-(NN),R-instruction <|>
1303 LD-RR,(NN)-instruction <|>
1304 LD-R,(NN)-instruction <|>
1305 ADC-R,N-instruction <|>
1306 ADC-R,R-instruction <|>
1307 ADC-R,(RR)-instruction <|>
1308 ADD-R,N-instruction <|>
1309 ADD-R,R-instruction <|>
1310 ADD-RR,RR-instruction <|>
1311 ADD-R,(RR)-instruction <|>
1312 SBC-R,N-instruction <|>
1313 SBC-R,R-instruction <|>
1314 SBC-R,(RR)-instruction <|>
1315 SUB-R-instruction <|>
1316 SUB-(RR)-instruction <|>
1317 SUB-N-instruction <|>
1318 RET-F|FF-instruction <|>
1319 RET-NN-instruction <|>
1320 OUT-(N),R-instruction <|>
1321 IN-R,(N)-instruction <|>
1322 EX-(RR),RR-instruction <|>
1323 EX-RR,RR-instruction <|>
1326 : instruction-quotations ( string -- emulate-quot )
1327 #! Given an instruction string, return the emulation quotation for
1328 #! it. This will later be expanded to produce the disassembly and
1329 #! assembly quotations.
1330 8080-generator-parser some parse call ;
1332 SYMBOL: last-instruction
1335 : parse-instructions ( list -- emulate-quot )
1336 #! Process the list of strings, which should make
1337 #! up an 8080 instruction, and output a quotation
1338 #! that would implement that instruction.
1339 dup " " join instruction-quotations
1340 >r "_" join [ "emulate-" % % ] "" make create-in dup last-instruction global set-at
1341 r> define-compound ;
1343 : INSTRUCTION: ";" parse-tokens parse-instructions ; parsing
1346 #! Set the number of cycles for the last instruction that was defined.
1347 scan string>number last-opcode global at instruction-cycles set-nth ; parsing
1350 #! Set the opcode number for the last instruction that was defined.
1351 last-instruction global at 1quotation scan 16 base>
1352 dup last-opcode global set-at instructions set-nth ; parsing
1354 INSTRUCTION: NOP ; opcode 00 cycles 04
1355 INSTRUCTION: LD BC,nn ; opcode 01 cycles 10
1356 INSTRUCTION: LD (BC),A ; opcode 02 cycles 07
1357 INSTRUCTION: INC BC ; opcode 03 cycles 06
1358 INSTRUCTION: INC B ; opcode 04 cycles 05
1359 INSTRUCTION: DEC B ; opcode 05 cycles 05
1360 INSTRUCTION: LD B,n ; opcode 06 cycles 07
1361 INSTRUCTION: RLCA ; opcode 07 cycles 04
1362 ! INSTRUCTION: NOP ; opcode 08 cycles 04
1363 INSTRUCTION: ADD HL,BC ; opcode 09 cycles 11
1364 INSTRUCTION: LD A,(BC) ; opcode 0A cycles 07
1365 INSTRUCTION: DEC BC ; opcode 0B cycles 06
1366 INSTRUCTION: INC C ; opcode 0C cycles 05
1367 INSTRUCTION: DEC C ; opcode 0D cycles 05
1368 INSTRUCTION: LD C,n ; opcode 0E cycles 07
1369 INSTRUCTION: RRCA ; opcode 0F cycles 04
1370 INSTRUCTION: LD DE,nn ; opcode 11 cycles 10
1371 INSTRUCTION: LD (DE),A ; opcode 12 cycles 07
1372 INSTRUCTION: INC DE ; opcode 13 cycles 06
1373 INSTRUCTION: INC D ; opcode 14 cycles 05
1374 INSTRUCTION: DEC D ; opcode 15 cycles 05
1375 INSTRUCTION: LD D,n ; opcode 16 cycles 07
1376 INSTRUCTION: RLA ; opcode 17 cycles 04
1377 INSTRUCTION: ADD HL,DE ; opcode 19 cycles 11
1378 INSTRUCTION: LD A,(DE) ; opcode 1A cycles 07
1379 INSTRUCTION: DEC DE ; opcode 1B cycles 06
1380 INSTRUCTION: INC E ; opcode 1C cycles 05
1381 INSTRUCTION: DEC E ; opcode 1D cycles 05
1382 INSTRUCTION: LD E,n ; opcode 1E cycles 07
1383 INSTRUCTION: RRA ; opcode 1F cycles 04
1384 INSTRUCTION: LD HL,nn ; opcode 21 cycles 10
1385 INSTRUCTION: LD (nn),HL ; opcode 22 cycles 16
1386 INSTRUCTION: INC HL ; opcode 23 cycles 06
1387 INSTRUCTION: INC H ; opcode 24 cycles 05
1388 INSTRUCTION: DEC H ; opcode 25 cycles 05
1389 INSTRUCTION: LD H,n ; opcode 26 cycles 07
1390 INSTRUCTION: DAA ; opcode 27 cycles 04
1391 INSTRUCTION: ADD HL,HL ; opcode 29 cycles 11
1392 INSTRUCTION: LD HL,(nn) ; opcode 2A cycles 16
1393 INSTRUCTION: DEC HL ; opcode 2B cycles 06
1394 INSTRUCTION: INC L ; opcode 2C cycles 05
1395 INSTRUCTION: DEC L ; opcode 2D cycles 05
1396 INSTRUCTION: LD L,n ; opcode 2E cycles 07
1397 INSTRUCTION: CPL ; opcode 2F cycles 04
1398 INSTRUCTION: LD SP,nn ; opcode 31 cycles 10
1399 INSTRUCTION: LD (nn),A ; opcode 32 cycles 13
1400 INSTRUCTION: INC SP ; opcode 33 cycles 06
1401 INSTRUCTION: INC (HL) ; opcode 34 cycles 10
1402 INSTRUCTION: DEC (HL) ; opcode 35 cycles 10
1403 INSTRUCTION: LD (HL),n ; opcode 36 cycles 10
1404 INSTRUCTION: SCF ; opcode 37 cycles 04
1405 INSTRUCTION: ADD HL,SP ; opcode 39 cycles 11
1406 INSTRUCTION: LD A,(nn) ; opcode 3A cycles 13
1407 INSTRUCTION: DEC SP ; opcode 3B cycles 06
1408 INSTRUCTION: INC A ; opcode 3C cycles 05
1409 INSTRUCTION: DEC A ; opcode 3D cycles 05
1410 INSTRUCTION: LD A,n ; opcode 3E cycles 07
1411 INSTRUCTION: CCF ; opcode 3F cycles 04
1412 INSTRUCTION: LD B,B ; opcode 40 cycles 05
1413 INSTRUCTION: LD B,C ; opcode 41 cycles 05
1414 INSTRUCTION: LD B,D ; opcode 42 cycles 05
1415 INSTRUCTION: LD B,E ; opcode 43 cycles 05
1416 INSTRUCTION: LD B,H ; opcode 44 cycles 05
1417 INSTRUCTION: LD B,L ; opcode 45 cycles 05
1418 INSTRUCTION: LD B,(HL) ; opcode 46 cycles 07
1419 INSTRUCTION: LD B,A ; opcode 47 cycles 05
1420 INSTRUCTION: LD C,B ; opcode 48 cycles 05
1421 INSTRUCTION: LD C,C ; opcode 49 cycles 05
1422 INSTRUCTION: LD C,D ; opcode 4A cycles 05
1423 INSTRUCTION: LD C,E ; opcode 4B cycles 05
1424 INSTRUCTION: LD C,H ; opcode 4C cycles 05
1425 INSTRUCTION: LD C,L ; opcode 4D cycles 05
1426 INSTRUCTION: LD C,(HL) ; opcode 4E cycles 07
1427 INSTRUCTION: LD C,A ; opcode 4F cycles 05
1428 INSTRUCTION: LD D,B ; opcode 50 cycles 05
1429 INSTRUCTION: LD D,C ; opcode 51 cycles 05
1430 INSTRUCTION: LD D,D ; opcode 52 cycles 05
1431 INSTRUCTION: LD D,E ; opcode 53 cycles 05
1432 INSTRUCTION: LD D,H ; opcode 54 cycles 05
1433 INSTRUCTION: LD D,L ; opcode 55 cycles 05
1434 INSTRUCTION: LD D,(HL) ; opcode 56 cycles 07
1435 INSTRUCTION: LD D,A ; opcode 57 cycles 05
1436 INSTRUCTION: LD E,B ; opcode 58 cycles 05
1437 INSTRUCTION: LD E,C ; opcode 59 cycles 05
1438 INSTRUCTION: LD E,D ; opcode 5A cycles 05
1439 INSTRUCTION: LD E,E ; opcode 5B cycles 05
1440 INSTRUCTION: LD E,H ; opcode 5C cycles 05
1441 INSTRUCTION: LD E,L ; opcode 5D cycles 05
1442 INSTRUCTION: LD E,(HL) ; opcode 5E cycles 07
1443 INSTRUCTION: LD E,A ; opcode 5F cycles 05
1444 INSTRUCTION: LD H,B ; opcode 60 cycles 05
1445 INSTRUCTION: LD H,C ; opcode 61 cycles 05
1446 INSTRUCTION: LD H,D ; opcode 62 cycles 05
1447 INSTRUCTION: LD H,E ; opcode 63 cycles 05
1448 INSTRUCTION: LD H,H ; opcode 64 cycles 05
1449 INSTRUCTION: LD H,L ; opcode 65 cycles 05
1450 INSTRUCTION: LD H,(HL) ; opcode 66 cycles 07
1451 INSTRUCTION: LD H,A ; opcode 67 cycles 05
1452 INSTRUCTION: LD L,B ; opcode 68 cycles 05
1453 INSTRUCTION: LD L,C ; opcode 69 cycles 05
1454 INSTRUCTION: LD L,D ; opcode 6A cycles 05
1455 INSTRUCTION: LD L,E ; opcode 6B cycles 05
1456 INSTRUCTION: LD L,H ; opcode 6C cycles 05
1457 INSTRUCTION: LD L,L ; opcode 6D cycles 05
1458 INSTRUCTION: LD L,(HL) ; opcode 6E cycles 07
1459 INSTRUCTION: LD L,A ; opcode 6F cycles 05
1460 INSTRUCTION: LD (HL),B ; opcode 70 cycles 07
1461 INSTRUCTION: LD (HL),C ; opcode 71 cycles 07
1462 INSTRUCTION: LD (HL),D ; opcode 72 cycles 07
1463 INSTRUCTION: LD (HL),E ; opcode 73 cycles 07
1464 INSTRUCTION: LD (HL),H ; opcode 74 cycles 07
1465 INSTRUCTION: LD (HL),L ; opcode 75 cycles 07
1466 INSTRUCTION: HALT ; opcode 76 cycles 07
1467 INSTRUCTION: LD (HL),A ; opcode 77 cycles 07
1468 INSTRUCTION: LD A,B ; opcode 78 cycles 05
1469 INSTRUCTION: LD A,C ; opcode 79 cycles 05
1470 INSTRUCTION: LD A,D ; opcode 7A cycles 05
1471 INSTRUCTION: LD A,E ; opcode 7B cycles 05
1472 INSTRUCTION: LD A,H ; opcode 7C cycles 05
1473 INSTRUCTION: LD A,L ; opcode 7D cycles 05
1474 INSTRUCTION: LD A,(HL) ; opcode 7E cycles 07
1475 INSTRUCTION: LD A,A ; opcode 7F cycles 05
1476 INSTRUCTION: ADD A,B ; opcode 80 cycles 04
1477 INSTRUCTION: ADD A,C ; opcode 81 cycles 04
1478 INSTRUCTION: ADD A,D ; opcode 82 cycles 04
1479 INSTRUCTION: ADD A,E ; opcode 83 cycles 04
1480 INSTRUCTION: ADD A,H ; opcode 84 cycles 04
1481 INSTRUCTION: ADD A,L ; opcode 85 cycles 04
1482 INSTRUCTION: ADD A,(HL) ; opcode 86 cycles 07
1483 INSTRUCTION: ADD A,A ; opcode 87 cycles 04
1484 INSTRUCTION: ADC A,B ; opcode 88 cycles 04
1485 INSTRUCTION: ADC A,C ; opcode 89 cycles 04
1486 INSTRUCTION: ADC A,D ; opcode 8A cycles 04
1487 INSTRUCTION: ADC A,E ; opcode 8B cycles 04
1488 INSTRUCTION: ADC A,H ; opcode 8C cycles 04
1489 INSTRUCTION: ADC A,L ; opcode 8D cycles 04
1490 INSTRUCTION: ADC A,(HL) ; opcode 8E cycles 07
1491 INSTRUCTION: ADC A,A ; opcode 8F cycles 04
1492 INSTRUCTION: SUB B ; opcode 90 cycles 04
1493 INSTRUCTION: SUB C ; opcode 91 cycles 04
1494 INSTRUCTION: SUB D ; opcode 92 cycles 04
1495 INSTRUCTION: SUB E ; opcode 93 cycles 04
1496 INSTRUCTION: SUB H ; opcode 94 cycles 04
1497 INSTRUCTION: SUB L ; opcode 95 cycles 04
1498 INSTRUCTION: SUB (HL) ; opcode 96 cycles 07
1499 INSTRUCTION: SUB A ; opcode 97 cycles 04
1500 INSTRUCTION: SBC A,B ; opcode 98 cycles 04
1501 INSTRUCTION: SBC A,C ; opcode 99 cycles 04
1502 INSTRUCTION: SBC A,D ; opcode 9A cycles 04
1503 INSTRUCTION: SBC A,E ; opcode 9B cycles 04
1504 INSTRUCTION: SBC A,H ; opcode 9C cycles 04
1505 INSTRUCTION: SBC A,L ; opcode 9D cycles 04
1506 INSTRUCTION: SBC A,(HL) ; opcode 9E cycles 07
1507 INSTRUCTION: SBC A,A ; opcode 9F cycles 04
1508 INSTRUCTION: AND B ; opcode A0 cycles 04
1509 INSTRUCTION: AND C ; opcode A1 cycles 04
1510 INSTRUCTION: AND D ; opcode A2 cycles 04
1511 INSTRUCTION: AND E ; opcode A3 cycles 04
1512 INSTRUCTION: AND H ; opcode A4 cycles 04
1513 INSTRUCTION: AND L ; opcode A5 cycles 04
1514 INSTRUCTION: AND (HL) ; opcode A6 cycles 07
1515 INSTRUCTION: AND A ; opcode A7 cycles 04
1516 INSTRUCTION: XOR B ; opcode A8 cycles 04
1517 INSTRUCTION: XOR C ; opcode A9 cycles 04
1518 INSTRUCTION: XOR D ; opcode AA cycles 04
1519 INSTRUCTION: XOR E ; opcode AB cycles 04
1520 INSTRUCTION: XOR H ; opcode AC cycles 04
1521 INSTRUCTION: XOR L ; opcode AD cycles 04
1522 INSTRUCTION: XOR (HL) ; opcode AE cycles 07
1523 INSTRUCTION: XOR A ; opcode AF cycles 04
1524 INSTRUCTION: OR B ; opcode B0 cycles 04
1525 INSTRUCTION: OR C ; opcode B1 cycles 04
1526 INSTRUCTION: OR D ; opcode B2 cycles 04
1527 INSTRUCTION: OR E ; opcode B3 cycles 04
1528 INSTRUCTION: OR H ; opcode B4 cycles 04
1529 INSTRUCTION: OR L ; opcode B5 cycles 04
1530 INSTRUCTION: OR (HL) ; opcode B6 cycles 07
1531 INSTRUCTION: OR A ; opcode B7 cycles 04
1532 INSTRUCTION: CP B ; opcode B8 cycles 04
1533 INSTRUCTION: CP C ; opcode B9 cycles 04
1534 INSTRUCTION: CP D ; opcode BA cycles 04
1535 INSTRUCTION: CP E ; opcode BB cycles 04
1536 INSTRUCTION: CP H ; opcode BC cycles 04
1537 INSTRUCTION: CP L ; opcode BD cycles 04
1538 INSTRUCTION: CP (HL) ; opcode BE cycles 07
1539 INSTRUCTION: CP A ; opcode BF cycles 04
1540 INSTRUCTION: RET NZ ; opcode C0 cycles 05
1541 INSTRUCTION: POP BC ; opcode C1 cycles 10
1542 INSTRUCTION: JP NZ,nn ; opcode C2 cycles 10
1543 INSTRUCTION: JP nn ; opcode C3 cycles 10
1544 INSTRUCTION: CALL NZ,nn ; opcode C4 cycles 11
1545 INSTRUCTION: PUSH BC ; opcode C5 cycles 11
1546 INSTRUCTION: ADD A,n ; opcode C6 cycles 07
1547 INSTRUCTION: RST 0 ; opcode C7 cycles 11
1548 INSTRUCTION: RET Z ; opcode C8 cycles 05
1549 INSTRUCTION: RET nn ; opcode C9 cycles 10
1550 INSTRUCTION: JP Z,nn ; opcode CA cycles 10
1551 INSTRUCTION: CALL Z,nn ; opcode CC cycles 11
1552 INSTRUCTION: CALL nn ; opcode CD cycles 17
1553 INSTRUCTION: ADC A,n ; opcode CE cycles 07
1554 INSTRUCTION: RST 8 ; opcode CF cycles 11
1555 INSTRUCTION: RET NC ; opcode D0 cycles 05
1556 INSTRUCTION: POP DE ; opcode D1 cycles 10
1557 INSTRUCTION: JP NC,nn ; opcode D2 cycles 10
1558 INSTRUCTION: OUT (n),A ; opcode D3 cycles 10
1559 INSTRUCTION: CALL NC,nn ; opcode D4 cycles 11
1560 INSTRUCTION: PUSH DE ; opcode D5 cycles 11
1561 INSTRUCTION: SUB n ; opcode D6 cycles 07
1562 INSTRUCTION: RST 10H ; opcode D7 cycles 11
1563 INSTRUCTION: RET C ; opcode D8 cycles 05
1564 INSTRUCTION: JP C,nn ; opcode DA cycles 10
1565 INSTRUCTION: IN A,(n) ; opcode DB cycles 10
1566 INSTRUCTION: CALL C,nn ; opcode DC cycles 11
1567 INSTRUCTION: SBC A,n ; opcode DE cycles 07
1568 INSTRUCTION: RST 18H ; opcode DF cycles 11
1569 INSTRUCTION: RET PO ; opcode E0 cycles 05
1570 INSTRUCTION: POP HL ; opcode E1 cycles 10
1571 INSTRUCTION: JP PO,nn ; opcode E2 cycles 10
1572 INSTRUCTION: EX (SP),HL ; opcode E3 cycles 04
1573 INSTRUCTION: CALL PO,nn ; opcode E4 cycles 11
1574 INSTRUCTION: PUSH HL ; opcode E5 cycles 11
1575 INSTRUCTION: AND n ; opcode E6 cycles 07
1576 INSTRUCTION: RST 20H ; opcode E7 cycles 11
1577 INSTRUCTION: RET PE ; opcode E8 cycles 05
1578 INSTRUCTION: JP (HL) ; opcode E9 cycles 04
1579 INSTRUCTION: JP PE,nn ; opcode EA cycles 10
1580 INSTRUCTION: EX DE,HL ; opcode EB cycles 04
1581 INSTRUCTION: CALL PE,nn ; opcode EC cycles 11
1582 INSTRUCTION: XOR n ; opcode EE cycles 07
1583 INSTRUCTION: RST 28H ; opcode EF cycles 11
1584 INSTRUCTION: RET P ; opcode F0 cycles 05
1585 INSTRUCTION: POP AF ; opcode F1 cycles 10
1586 INSTRUCTION: JP P,nn ; opcode F2 cycles 10
1587 INSTRUCTION: DI ; opcode F3 cycles 04
1588 INSTRUCTION: CALL P,nn ; opcode F4 cycles 11
1589 INSTRUCTION: PUSH AF ; opcode F5 cycles 11
1590 INSTRUCTION: OR n ; opcode F6 cycles 07
1591 INSTRUCTION: RST 30H ; opcode F7 cycles 11
1592 INSTRUCTION: RET M ; opcode F8 cycles 05
1593 INSTRUCTION: LD SP,HL ; opcode F9 cycles 06
1594 INSTRUCTION: JP M,nn ; opcode FA cycles 10
1595 INSTRUCTION: EI ; opcode FB cycles 04
1596 INSTRUCTION: CALL M,nn ; opcode FC cycles 11
1597 INSTRUCTION: CP n ; opcode FE cycles 07
1598 INSTRUCTION: RST 38H ; opcode FF cycles 11
1600 ! : each-8bit ( n quot -- )
1602 ! pick over -1 * shift 1 bitand pick call
1605 ! : >ppm ( cpu filename -- cpu )
1606 ! #! Dump the current screen image to a ppm image file with the given name.
1613 ! over 32 * over + HEX: 2400 + ! cpu h w addr
1614 ! >r pick r> swap cpu-ram nth [
1626 test-cpu [ 1000000 run-n ] time ;