5 #define FACTOR_CPU_STRING "ppc.64"
7 #define FACTOR_CPU_STRING "ppc.32"
10 #define CALLSTACK_BOTTOM(ctx) (stack_frame *)(ctx->callstack_seg->end - 32)
12 /* In the instruction sequence:
17 the offset from the immediate operand to LOAD32 to the instruction after
18 the branch is one instruction. */
19 static const fixnum xt_tail_pic_offset = 4;
21 inline static void check_call_site(cell return_address)
23 u32 insn = *(u32 *)return_address;
24 /* Check that absolute bit is 0 */
25 assert((insn & 0x2) == 0x0);
26 /* Check that instruction is branch */
27 assert((insn >> 26) == 0x12);
30 static const u32 b_mask = 0x3fffffc;
32 inline static void *get_call_target(cell return_address)
35 check_call_site(return_address);
37 u32 insn = *(u32 *)return_address;
38 u32 unsigned_addr = (insn & b_mask);
39 s32 signed_addr = (s32)(unsigned_addr << 6) >> 6;
40 return (void *)(signed_addr + return_address);
43 inline static void set_call_target(cell return_address, void *target)
46 check_call_site(return_address);
48 u32 insn = *(u32 *)return_address;
50 fixnum relative_address = ((cell)target - return_address);
51 insn = ((insn & ~b_mask) | (relative_address & b_mask));
52 *(u32 *)return_address = insn;
54 /* Flush the cache line containing the call we just patched */
55 __asm__ __volatile__ ("icbi 0, %0\n" "sync\n"::"r" (return_address):);
58 inline static bool tail_call_site_p(cell return_address)
61 u32 insn = *(u32 *)return_address;
62 return (insn & 0x1) == 0;
65 inline static unsigned int fpu_status(unsigned int status)
69 if (status & 0x20000000)
70 r |= FP_TRAP_INVALID_OPERATION;
71 if (status & 0x10000000)
72 r |= FP_TRAP_OVERFLOW;
73 if (status & 0x08000000)
74 r |= FP_TRAP_UNDERFLOW;
75 if (status & 0x04000000)
76 r |= FP_TRAP_ZERO_DIVIDE;
77 if (status & 0x02000000)
83 /* Defined in assembly */
84 VM_C_API void flush_icache(cell start, cell len);