4 /* arg is a literal table index, holding a pair (symbol/dll) */
6 /* a word or quotation's general entry point */
8 /* a word's PIC entry point */
10 /* a word's tail-call PIC entry point */
11 RT_ENTRY_POINT_PIC_TAIL,
14 /* current code block */
16 /* data heap literal */
18 /* untagged fixnum literal */
20 /* address of megamorphic_cache_hits var */
21 RT_MEGAMORPHIC_CACHE_HITS,
22 /* address of vm object */
24 /* value of vm->cards_offset */
26 /* value of vm->decks_offset */
28 /* address of exception_handler -- this exists as a separate relocation
29 type since its used in a situation where relocation arguments cannot
30 be passed in, and so RT_DLSYM is inappropriate (Windows only) */
32 /* arg is a literal table index, holding a pair (symbol/dll) */
34 /* address of inline_cache_miss function. This is a separate
35 relocation to reduce compile time and size for PICs. */
37 /* address of safepoint page in code heap */
41 enum relocation_class {
42 /* absolute address in a pointer-width location */
44 /* absolute address in a 4 byte location */
46 /* relative address in a 4 byte location */
48 /* absolute address in a PowerPC LIS/ORI sequence */
50 /* absolute address in a PowerPC LWZ instruction */
52 /* relative address in a PowerPC LWZ/STW/BC instruction */
54 /* relative address in a PowerPC B/BL instruction */
56 /* relative address in an ARM B/BL instruction */
58 /* pointer to address in an ARM LDR/STR instruction */
60 /* pointer to address in an ARM LDR/STR instruction offset by 8 bytes */
62 /* absolute address in a 2 byte location */
64 /* absolute address in a 1 byte location */
66 /* absolute address in a PowerPC LIS/ORI/SLDI/ORIS/ORI sequence */
67 RC_ABSOLUTE_PPC_2_2_2_2,
70 static const cell rel_absolute_ppc_2_mask = 0x0000ffff;
71 static const cell rel_relative_ppc_2_mask = 0x0000fffc;
72 static const cell rel_relative_ppc_3_mask = 0x03fffffc;
73 static const cell rel_indirect_arm_mask = 0x00000fff;
74 static const cell rel_relative_arm_3_mask = 0x00ffffff;
76 /* code relocation table consists of a table of entries for each fixup */
77 struct relocation_entry {
80 explicit relocation_entry(u32 value_) : value(value_) {}
82 relocation_entry(relocation_type rel_type, relocation_class rel_class,
84 value = (u32)((rel_type << 28) | (rel_class << 24) | offset);
87 relocation_type rel_type() {
88 return (relocation_type)((value & 0xf0000000) >> 28);
91 relocation_class rel_class() {
92 return (relocation_class)((value & 0x0f000000) >> 24);
95 cell rel_offset() { return (value & 0x00ffffff); }
97 int number_of_parameters() {
105 case RT_ENTRY_POINT_PIC:
106 case RT_ENTRY_POINT_PIC_TAIL:
111 case RT_MEGAMORPHIC_CACHE_HITS:
112 case RT_CARDS_OFFSET:
113 case RT_DECKS_OFFSET:
114 case RT_EXCEPTION_HANDLER:
115 case RT_INLINE_CACHE_MISS:
119 critical_error("Bad rel type in number_of_parameters()", rel_type());
120 return -1; /* Can't happen */
125 struct instruction_operand {
126 relocation_entry rel;
127 code_block* compiled;
131 instruction_operand(relocation_entry rel_, code_block* compiled_,
134 relocation_type rel_type() { return rel.rel_type(); }
136 cell rel_offset() { return rel.rel_offset(); }
138 fixnum load_value_2_2();
139 fixnum load_value_2_2_2_2();
140 fixnum load_value_masked(cell mask, cell bits, cell shift);
141 fixnum load_value(cell relative_to);
143 code_block* load_code_block(cell relative_to);
144 code_block* load_code_block();
146 void store_value_2_2(fixnum value);
147 void store_value_2_2_2_2(fixnum value);
148 void store_value_masked(fixnum value, cell mask, cell shift);
149 void store_value(fixnum value);
150 void store_code_block(code_block* compiled);