INSN: ##return ;
+INSN: ##safepoint ;
+
! Dummy instruction that simply inhibits TCO
INSN: ##no-tco ;
##branch
##dispatch
conditional-branch-insn
+##safepoint
##epilogue ##return
##callback-outputs ;
CODEGEN: ##call %call
CODEGEN: ##jump %jump
CODEGEN: ##return %return
+CODEGEN: ##safepoint %safepoint
CODEGEN: ##slot %slot
CODEGEN: ##slot-imm %slot-imm
CODEGEN: ##set-slot %set-slot
HOOK: %prologue cpu ( n -- )
HOOK: %epilogue cpu ( n -- )
+HOOK: %safepoint cpu ( -- )
+
HOOK: test-instruction? cpu ( -- ? )
M: object test-instruction? f ;
M: x86.32 %cleanup ( n -- )
[ ESP swap SUB ] unless-zero ;
+M: x86.32 %safepoint
+ 0 EAX MOVABS rc-absolute rel-safepoint ;
+
M: x86.32 dummy-stack-params? f ;
M: x86.32 dummy-int-params? f ;
M: x86.64 %cleanup 0 assert= ;
+M: x86.64 %safepoint
+ 0 [RIP+] EAX MOV rc-relative rel-safepoint ;
+
M: x86.64 long-long-on-stack? f ;
M: x86.64 float-on-stack? f ;