cpu.ppc.bootstrap: updates

diff --git a/basis/cpu/ppc/bootstrap.factor b/basis/cpu/ppc/bootstrap.factor
index 6a00dec12f699c969d2cce19ebc4b62d8dca3667..b09938f4b9bbe208ccee56eb42658d76aa074005 100644 (file)
--- a/basis/cpu/ppc/bootstrap.factor
+++ b/basis/cpu/ppc/bootstrap.factor
@@ -21,43 +21,48 @@ CONSTANT: rs-reg 14
 : xt-save ( -- n ) stack-frame 2 bootstrap-cells - ;\r
 \r
 [\r
-    0 6 LOAD32 rc-absolute-ppc-2/2 rt-immediate jit-rel\r
-    11 6 profile-count-offset LWZ\r
+    0 3 LOAD32 rc-absolute-ppc-2/2 rt-immediate jit-rel\r
+    11 3 profile-count-offset LWZ\r
     11 11 1 tag-fixnum ADDI\r
-    11 6 profile-count-offset STW\r
-    11 6 word-code-offset LWZ\r
+    11 3 profile-count-offset STW\r
+    11 3 word-code-offset LWZ\r
     11 11 compiled-header-size ADDI\r
     11 MTCTR\r
     BCTR\r
 ] jit-profiling jit-define\r
 \r
 [\r
-    0 6 LOAD32 rc-absolute-ppc-2/2 rt-this jit-rel\r
+    0 3 LOAD32 rc-absolute-ppc-2/2 rt-this jit-rel\r
     0 MFLR\r
     1 1 stack-frame SUBI\r
-    6 1 xt-save STW\r
-    stack-frame 6 LI\r
-    6 1 next-save STW\r
+    3 1 xt-save STW\r
+    stack-frame 3 LI\r
+    3 1 next-save STW\r
     0 1 lr-save stack-frame + STW\r
 ] jit-prolog jit-define\r
 \r
 [\r
-    0 6 LOAD32 rc-absolute-ppc-2/2 rt-immediate jit-rel\r
-    6 ds-reg 4 STWU\r
+    0 3 LOAD32 rc-absolute-ppc-2/2 rt-immediate jit-rel\r
+    3 ds-reg 4 STWU\r
 ] jit-push-immediate jit-define\r
 \r
 [\r
-    0 6 LOAD32 rc-absolute-ppc-2/2 rt-stack-chain jit-rel\r
-    7 6 0 LWZ\r
-    1 7 0 STW\r
-    0 6 LOAD32 rc-absolute-ppc-2/2 rt-primitive jit-rel\r
-    6 MTCTR\r
+    0 3 LOAD32 rc-absolute-ppc-2/2 rt-stack-chain jit-rel\r
+    4 3 0 LWZ\r
+    1 4 0 STW\r
+    0 3 LOAD32 rc-absolute-ppc-2/2 rt-primitive jit-rel\r
+    3 MTCTR\r
     BCTR\r
 ] jit-primitive jit-define\r
 \r
 [ 0 BL rc-relative-ppc-3 rt-xt-pic jit-rel ] jit-word-call jit-define\r
 \r
-[ 0 B rc-relative-ppc-3 rt-xt jit-rel ] jit-word-jump jit-define\r
+[\r
+    0 6 LOAD32 rc-absolute-ppc-2/2 rt-here jit-rel\r
+    0 B rc-relative-ppc-3 rt-xt-pic-tail jit-rel\r
+] jit-word-jump jit-define\r
+\r
+[ 0 B rc-relative-ppc-3 rt-xt jit-rel ] jit-word-special jit-define\r
 \r
 [\r
     3 ds-reg 0 LWZ\r
@@ -152,6 +157,9 @@ CONSTANT: rs-reg 14
 \r
 ! ! ! Polymorphic inline caches\r
 \r
+! Don't touch r6 here; it's used to pass the tail call site\r
+! address for tail PICs\r
+\r
 ! Load a value from a stack position\r
 [\r
     4 ds-reg 0 LWZ rc-absolute-ppc-2 rt-untagged jit-rel\r
@@ -225,7 +233,7 @@ CONSTANT: rs-reg 14
     ! if(get(cache) == class)\r
     6 3 0 LWZ\r
     6 0 4 CMP\r
-    5 BNE\r
+    10 BNE\r
     ! megamorphic_cache_hits++\r
     0 4 LOAD32 rc-absolute-ppc-2/2 rt-megamorphic-cache-hits jit-rel\r
     5 4 0 LWZ\r