M: float-regs load-insn
[ fastcall-regs nth swap stack@ ] keep MOVSS/LPD ;
+M: stack-params load-insn 3drop ;
+
M: %unbox generate-node ( vop -- )
drop
! Call the unboxer
! See http://factorcode.org/license.txt for BSD license.
IN: compiler-backend
USING: alien arrays assembler compiler compiler-backend kernel
-kernel-internals math sequences ;
+kernel-internals math namespaces sequences ;
! AMD64 register assignments
! RAX RCX RDX RSI RDI R8 R9 R10 R11 vregs
#! We use RIP-relative addressing. The '3' is a hardcoded
#! instruction length.
add-literal from 3 - 1array MOV ; inline
+
+: stack-increment \ stack-reserve get 16 align 8 + ;
+
+: compile-epilogue ( -- )
+ RSP stack-increment ADD ; inline
SYMBOL: R13 \ R13 13 64 define-register
SYMBOL: R14 \ R14 14 64 define-register
SYMBOL: R15 \ R15 15 64 define-register
+
+SYMBOL: XMM8 \ XMM8 8 128 define-register
+SYMBOL: XMM9 \ XMM9 9 128 define-register
+SYMBOL: XMM10 \ XMM10 10 128 define-register
+SYMBOL: XMM11 \ XMM11 11 128 define-register
+SYMBOL: XMM12 \ XMM12 12 128 define-register
+SYMBOL: XMM13 \ XMM13 13 128 define-register
+SYMBOL: XMM14 \ XMM14 14 128 define-register
+SYMBOL: XMM15 \ XMM15 15 128 define-register
IN: compiler-backend
USING: assembler kernel math namespaces ;
-: stack-increment \ stack-reserve get 16 align 8 + ;
-
M: %prologue generate-node ( vop -- )
drop RSP stack-increment SUB ;
-
-: compile-epilogue ( -- )
- RSP stack-increment ADD ; inline
SYMBOL: ESI \ ESI 6 32 define-register
SYMBOL: EDI \ EDI 7 32 define-register
-SYMBOL: XMM0
-SYMBOL: XMM1
-SYMBOL: XMM2
-SYMBOL: XMM3
-SYMBOL: XMM4
-SYMBOL: XMM5
-SYMBOL: XMM6
-SYMBOL: XMM7
+SYMBOL: XMM0 \ XMM0 0 128 define-register
+SYMBOL: XMM1 \ XMM1 1 128 define-register
+SYMBOL: XMM2 \ XMM2 2 128 define-register
+SYMBOL: XMM3 \ XMM3 3 128 define-register
+SYMBOL: XMM4 \ XMM4 4 128 define-register
+SYMBOL: XMM5 \ XMM5 5 128 define-register
+SYMBOL: XMM6 \ XMM6 6 128 define-register
+SYMBOL: XMM7 \ XMM7 7 128 define-register
PREDICATE: word register "register" word-prop ;
PREDICATE: register register-32 "register-size" word-prop 32 = ;
PREDICATE: register register-64 "register-size" word-prop 64 = ;
+PREDICATE: register register-128 "register-size" word-prop 128 = ;
M: register modifier drop BIN: 11 ;
M: register register "register" word-prop 7 bitand ;
( SSE multimedia instructions )
-: MOVLPD ( dest src -- ) 2drop ;
-: MOVSS ( dest src -- ) 2drop ;
+: 2-operand-sse ( dst src op1 op2 -- )
+ pick register-128? [ nip ] [ drop swapd ] if
+ >r 2dup t rex-prefix HEX: 0f assemble-1 r>
+ assemble-1 register mod-r/m ;
+
+: MOVLPD ( dest src -- )
+ HEX: 66 assemble-1 HEX: 12 HEX: 13 2-operand-sse ;
+
+: MOVSS ( dest src -- )
+ HEX: f3 assemble-1 HEX: 10 HEX: 11 2-operand-sse ;
FUNCTION: double ffi_test_6 float x float y ; compiled
[ 6.0 ] [ 3.0 2.0 ffi_test_6 ] unit-test
+FUNCTION: double ffi_test_7 double x double y ; compiled
+[ 6.0 ] [ 3.0 2.0 ffi_test_7 ] unit-test
+
+FUNCTION: double ffi_test_8 double x float y double z float t int w ; compiled
+[ 19.0 ] [ 3.0 2.0 1.0 6.0 7 ffi_test_8 ] unit-test
+
return x * y;
}
-double ffi_test_7(void)
+double ffi_test_7(double x, double y)
{
- return 1.5;
+ printf("ffi_test_7(%f,%f)\n",x,y);
+ return x * y;
+}
+
+double ffi_test_8(double x, float y, double z, float t, int w)
+{
+ printf("ffi_test_8(%f,%f,%f,%f,%d)\n",x,y,z,t,w);
+ return x * y + z * t + w;
}