don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall...

diff --git a/basis/compiler/cfg/instructions/instructions.factor b/basis/compiler/cfg/instructions/instructions.factor
index de18a9b5f9324eb8d667c644b4664dbc11e2d0a0..02e70e7bc9984a61cae7a49564acb89c33fdc0ae 100644 (file)
--- a/basis/compiler/cfg/instructions/instructions.factor
+++ b/basis/compiler/cfg/instructions/instructions.factor
@@ -814,7 +814,6 @@ UNION: def-is-use-insn
 ##box-alien
 ##box-displaced-alien
 ##compare-vector
-##not-vector
 ##string-nth
 ##unbox-any-c-ptr ;
 

diff --git a/basis/compiler/cfg/intrinsics/intrinsics.factor b/basis/compiler/cfg/intrinsics/intrinsics.factor
index 0b6f5a94d59794121bd3bfaaf1b8f36ae4c3ffad..f7dc95098067d81161715b2264299989e1b3bdf9 100644 (file)
--- a/basis/compiler/cfg/intrinsics/intrinsics.factor
+++ b/basis/compiler/cfg/intrinsics/intrinsics.factor
@@ -171,12 +171,12 @@ IN: compiler.cfg.intrinsics
         { math.vectors.simd.intrinsics:(simd-vbitandn) [ [ ^^andn-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vbitor) [ [ ^^or-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vbitxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
-        { math.vectors.simd.intrinsics:(simd-vbitnot) [ [ ^^not-vector ] emit-unary-vector-op ] }
+        { math.vectors.simd.intrinsics:(simd-vbitnot) [ [ generate-not-vector ] emit-unary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vand) [ [ ^^and-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vandn) [ [ ^^andn-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vor) [ [ ^^or-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
-        { math.vectors.simd.intrinsics:(simd-vnot) [ [ ^^not-vector ] emit-unary-vector-op ] }
+        { math.vectors.simd.intrinsics:(simd-vnot) [ [ generate-not-vector ] emit-unary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-v<=) [ [ cc<= ^^compare-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-v<) [ [ cc< ^^compare-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-v=) [ [ cc= ^^compare-vector ] emit-binary-vector-op ] }

diff --git a/basis/compiler/cfg/intrinsics/simd/simd.factor b/basis/compiler/cfg/intrinsics/simd/simd.factor
index 62ee1cf019504ee1b8d3038e5c7bf949c2cb41db..faec6cceb415b0f82441e69327e1ff67824fcb88 100644 (file)
--- a/basis/compiler/cfg/intrinsics/simd/simd.factor
+++ b/basis/compiler/cfg/intrinsics/simd/simd.factor
@@ -115,3 +115,9 @@ MACRO: if-literals-match ( quots -- )
         [ byte-array inline-alien-setter? ]
         inline-alien
     ] with emit-vector-op ;
+
+: generate-not-vector ( src rep -- dst )
+    dup %not-vector-reps member?
+    [ ^^not-vector ]
+    [ [ ^^fill-vector ] [ ^^xor-vector ] bi ] if ;
+

diff --git a/basis/compiler/codegen/codegen.factor b/basis/compiler/codegen/codegen.factor
index 7366555fff1a77ce5347095b1b6c7a736194891e..59ad85d28fc0ed287dcbb3d4b57fc4c556321902 100755 (executable)
--- a/basis/compiler/codegen/codegen.factor
+++ b/basis/compiler/codegen/codegen.factor
@@ -160,6 +160,7 @@ CODEGEN: ##double>single-float %double>single-float
 CODEGEN: ##integer>float %integer>float
 CODEGEN: ##float>integer %float>integer
 CODEGEN: ##zero-vector %zero-vector
+CODEGEN: ##fill-vector %fill-vector
 CODEGEN: ##gather-vector-2 %gather-vector-2
 CODEGEN: ##gather-vector-4 %gather-vector-4
 CODEGEN: ##shuffle-vector %shuffle-vector

diff --git a/basis/cpu/x86/x86.factor b/basis/cpu/x86/x86.factor
index ef0ccf971ecd525c48a6b05eccf76dd8b8a074b1..469862038cea33b2e9e2a50c54bb30f20d5d77d6 100644 (file)
--- a/basis/cpu/x86/x86.factor
+++ b/basis/cpu/x86/x86.factor
@@ -869,13 +869,16 @@ M: x86 %float>integer-vector-reps
         { short-8-rep    [ int16 call ] }
         { char-16-rep    [ int8  call ] }
     } case ; inline
+:: (%not-vector) ( dst src rep -- )
+    dst rep %fill-vector
+    dst dst src rep %xor-vector ;
 :: %compare-int-vector ( dst src1 src2 temp rep cc -- )
     dst src1 src2 temp rep cc compare-int-v-operands :> cc' :> rep :> src' :> cmp-dst :> not-dst
     cmp-dst src' rep cc' {
         { cc= [ [ PCMPEQQ ] [ PCMPEQD ] [ PCMPEQW ] [ PCMPEQB ] (%compare-int-vector) ] }
         { cc> [ [ PCMPGTQ ] [ PCMPGTD ] [ PCMPGTW ] [ PCMPGTB ] (%compare-int-vector) ] }
     } case
-    not-dst [ cmp-dst rep %not-vector ] when* ;
+    not-dst [ cmp-dst rep (%not-vector) ] when* ;
 
 M: x86 %compare-vector ( dst src1 src2 temp rep cc -- )
     over float-vector-rep?
@@ -1230,15 +1233,7 @@ M: x86 %xor-vector-reps
         { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
     } available-reps ;
 
-M:: x86 %not-vector ( dst src rep -- )
-    dst rep %fill-vector
-    dst dst src rep %xor-vector ;
-
-M: x86 %not-vector-reps
-    {
-        { sse? { float-4-rep } }
-        { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
-    } available-reps ;
+M: x86 %not-vector-reps { } ;
 
 M: x86 %shl-vector ( dst src1 src2 rep -- )
     [ two-operand ] keep

diff --git a/basis/math/vectors/simd/intrinsics/intrinsics.factor b/basis/math/vectors/simd/intrinsics/intrinsics.factor
index ee15c8d997c96c0ec128cdd72e83e3a5ab429125..753d5a88e9e04ccc9b20fda8e12803b16e0360bf 100644 (file)
--- a/basis/math/vectors/simd/intrinsics/intrinsics.factor
+++ b/basis/math/vectors/simd/intrinsics/intrinsics.factor
@@ -157,12 +157,12 @@ M: vector-rep supported-simd-op?
         { \ (simd-vbitandn)      [ %andn-vector-reps           ] }
         { \ (simd-vbitor)        [ %or-vector-reps             ] }
         { \ (simd-vbitxor)       [ %xor-vector-reps            ] }
-        { \ (simd-vbitnot)       [ %not-vector-reps            ] }
+        { \ (simd-vbitnot)       [ %xor-vector-reps            ] }
         { \ (simd-vand)          [ %and-vector-reps            ] }
         { \ (simd-vandn)         [ %andn-vector-reps           ] }
         { \ (simd-vor)           [ %or-vector-reps             ] }
         { \ (simd-vxor)          [ %xor-vector-reps            ] }
-        { \ (simd-vnot)          [ %not-vector-reps            ] }
+        { \ (simd-vnot)          [ %xor-vector-reps            ] }
         { \ (simd-vlshift)       [ %shl-vector-reps            ] }
         { \ (simd-vrshift)       [ %shr-vector-reps            ] }
         { \ (simd-hlshift)       [ %horizontal-shl-vector-reps ] }