compiler.cfg.*: more docs

diff --git a/basis/compiler/cfg/linear-scan/allocation/state/state-docs.factor b/basis/compiler/cfg/linear-scan/allocation/state/state-docs.factor
index 9e54cd907817f44a766fc5aae883f7a51dc8fe00..f30bf1148815b4472fb9438c492b1674224eb411 100644 (file)
--- a/basis/compiler/cfg/linear-scan/allocation/state/state-docs.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/state/state-docs.factor
@@ -1,7 +1,20 @@
-USING: assocs compiler.cfg compiler.cfg.instructions cpu.architecture
-help.markup help.syntax math ;
+USING: assocs compiler.cfg compiler.cfg.instructions
+compiler.cfg.linear-scan.live-intervals cpu.architecture heaps help.markup
+help.syntax math vectors ;
 IN: compiler.cfg.linear-scan.allocation.state
 
+HELP: active-intervals
+{ $var-description { $link assoc } " of active live intervals. The keys are register class symbols and the values vectors of " { $link live-interval-state } "." } ;
+
+HELP: handled-intervals
+{ $var-description { $link vector } " of handled live intervals." } ;
+
+HELP: unhandled-intervals
+{ $var-description { $link min-heap } " of live intervals which still need a register allocation." } ;
+
+HELP: unhandled-sync-points
+{ $var-description { $link min-heap } " of sync points which still need to be processed." } ;
+
 HELP: init-allocator
 { $values { "registers" { $link assoc } " mapping from register class to available machine registers." } }
 { $description "Initializes the state for the register allocator." }

diff --git a/basis/compiler/cfg/linear-scan/allocation/state/state.factor b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
index deb05fbee2dea741aace68e92362ef0a058e161c..7fb17d7f049c2849e92cccc1271d0326e53405a8 100644 (file)
--- a/basis/compiler/cfg/linear-scan/allocation/state/state.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
@@ -31,7 +31,6 @@ SYMBOL: progress
 ! Mapping from register classes to sequences of machine registers
 SYMBOL: registers
 
-! Vector of active live intervals
 SYMBOL: active-intervals
 
 : active-intervals-for ( live-interval -- seq )
@@ -58,7 +57,6 @@ SYMBOL: inactive-intervals
 : delete-inactive ( live-interval -- )
     dup inactive-intervals-for remove-eq! drop ;
 
-! Vector of handled live intervals
 SYMBOL: handled-intervals
 
 : add-handled ( live-interval -- )

diff --git a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor
index 3b0f0fc5d8e47bbb58337bee96180d5dd1ecf48c..44205d4577a43f250cfd9e481706f9d9712fe882 100644 (file)
--- a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor
+++ b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor
@@ -1,6 +1,20 @@
-USING: help.markup help.syntax ;
+USING: compiler.cfg.instructions help.markup help.syntax ;
 IN: compiler.cfg.linear-scan.live-intervals
 
+HELP: live-intervals
+{ $var-description "Mapping from vreg to " { $link live-interval-state } "." } ;
+
+HELP: sync-point
+{ $class-description "A location where all registers have to be spilled. It has the following slots:"
+  { $table
+    { { $slot "n" } { "Set from an instructions sequence number." } }
+  }
+}
+{ $see-also insn } ;
+
+HELP: live-interval-state
+{ $class-description "A class encoding the \"liveness\" of a virtual register." } ;
+
 HELP: <live-interval>
 { $values
   { "vreg" "virtual register" }

diff --git a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
index 7e598420ab6b3cf7bf058803c7f09842409f4376..38e0b5ff82624fa9b6bf2e9dd1f35e684d22aa61 100644 (file)
--- a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
+++ b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
@@ -92,7 +92,6 @@ M: live-interval-state covers? ( insn# live-interval -- ? )
 
 SYMBOLS: from to ;
 
-! Mapping from vreg to live-interval
 SYMBOL: live-intervals
 
 : live-interval ( vreg -- live-interval )
@@ -161,7 +160,6 @@ M: hairy-clobber-insn compute-live-intervals* ( insn -- )
         [ live-interval add-range ] 2with each
     ] if ;
 
-! A location where all registers have to be spilled
 TUPLE: sync-point n keep-dst? ;
 
 C: <sync-point> sync-point

diff --git a/basis/compiler/cfg/linearization/linearization-docs.factor b/basis/compiler/cfg/linearization/linearization-docs.factor
index 934a574978989e1d71dd823b18601a4be498d34f..d6ba8017c0e3cf8550f75d31ac53d8552dde7242 100644 (file)
--- a/basis/compiler/cfg/linearization/linearization-docs.factor
+++ b/basis/compiler/cfg/linearization/linearization-docs.factor
@@ -1,5 +1,5 @@
-USING: compiler.cfg compiler.cfg.linearization compiler.codegen help.markup
-help.syntax kernel macros math sequences ;
+USING: compiler.cfg compiler.cfg.linearization compiler.cfg.rpo
+compiler.codegen help.markup help.syntax kernel macros math sequences ;
 IN: compiler.cfg.linearization
 
 HELP: linearization-order
@@ -8,7 +8,7 @@ HELP: linearization-order
   { "bbs" sequence }
 }
 { $description "Lists the basic blocks in linearization order. That is, the order in which they will be written in the generated assembly code." }
-{ $see-also generate } ;
+{ $see-also generate reverse-post-order } ;
 
 HELP: block-number
 { $values { "bb" basic-block } { "n" integer } }