arm64: ADR ADRP fix encoding

diff --git a/basis/cpu/arm/assembler/assembler.factor b/basis/cpu/arm/assembler/assembler.factor
index 163aa3897a4257d0a185e5a1390fd06a9fe1d6a6..375269e1e64f65113d86fd685ed9a988e7f09925 100644 (file)
--- a/basis/cpu/arm/assembler/assembler.factor
+++ b/basis/cpu/arm/assembler/assembler.factor
@@ -21,10 +21,10 @@ TUPLE: arm64-assembler ip labels out ;
 : >out ( instruction -- ) arm64-assembler get out>> push ;
 
 : ADR ( imm21 Rd -- )
-    [ [ 2 bits ] [ 19 bits ] bi ] dip ADR-encode >out ;
+    [ [ 2 bits ] [ -2 shift 19 bits ] bi ] dip ADR-encode >out ;
 
 : ADRP ( imm21 Rd -- )
-    [ [ 2 bits ] [ 19 bits ] bi ] dip ADRP-encode >out ;
+    [ [ 2 bits ] [ -2 shift 19 bits ] bi ] dip ADRP-encode >out ;
 
 : BL ( offset -- ) ip - 4 / BL-encode >out ;
 : BR ( register -- ) BR-encode >out ;

diff --git a/basis/cpu/arm/assembler/opcodes/opcodes-tests.factor b/basis/cpu/arm/assembler/opcodes/opcodes-tests.factor
index 905867ea9c351b66a9d2b3f87eff538c0528c063..77c9d0255f6d14bb836c8b24a61d978a90da94d4 100644 (file)
--- a/basis/cpu/arm/assembler/opcodes/opcodes-tests.factor
+++ b/basis/cpu/arm/assembler/opcodes/opcodes-tests.factor
@@ -1,6 +1,7 @@
 ! Copyright (C) 2020 Doug Coleman.
 ! See http://factorcode.org/license.txt for BSD license.
-USING: cpu.arm.assembler.opcodes math math.bitwise tools.test ;
+USING: cpu.arm.assembler cpu.arm.assembler.opcodes math
+math.bitwise tools.test ;
 IN: cpu.arm.assembler.opcodes.tests
 
 { 0b00011010000000110000000001000001 } [ X3 X2 X1 ADC32-encode ] unit-test
@@ -16,3 +17,10 @@ IN: cpu.arm.assembler.opcodes.tests
 
 ! stp x29, x30, [sp,#-16]!
 { 0xa9bf7bfd } [ -16 8 / 7 bits X30 SP X29 STPpre64-encode ] unit-test
+
+
+{ B{ 0 0 0 0x10 } } [ [ 0 X0 ADR ] assemble-arm ] unit-test
+{ B{ 0 0 0 0x30 } } [ [ 1 X0 ADR ] assemble-arm ] unit-test
+
+{ B{ 0 0 0 0x90 } } [ [ 0 X0 ADRP ] assemble-arm ] unit-test
+{ B{ 0 0 0 0xb0 } } [ [ 1 X0 ADRP ] assemble-arm ] unit-test