cpu.arm.assembler.opcodes generic.single.private
kernel kernel.private layouts locals locals.backend
math math.private memory namespaces sequences slots.private
-strings.private threads.private vocabs ;
+strings.private threads.private vocabs make ;
IN: bootstrap.arm
8 \ cell set
! : pic-tail-reg ( -- reg ) RBX ;
-! : return-reg ( -- reg ) RAX ;
+: return-reg ( -- reg ) X0 ;
! : nv-reg ( -- reg ) RBX ;
! : stack-reg ( -- reg ) RSP ;
! : frame-reg ( -- reg ) RBP ;
! : link-reg ( -- reg ) R11 ;
! : ctx-reg ( -- reg ) R12 ;
-! : vm-reg ( -- reg ) R13 ;
+: vm-reg ( -- reg ) X7 ;
: ds-reg ( -- reg ) X5 ;
: rs-reg ( -- reg ) X6 ;
! : fixnum>slot@ ( -- ) temp0 1 SAR ;
: jit-jump-quot ( -- ) ;
! arg1 quot-entry-point-offset [+] JMP ;
-: jit-call-quot ( -- ) ;
+: jit-call-quot ( -- )
+ quot-entry-point-offset arg1 ADR
+ arg1 BR ;
+
! arg1 quot-entry-point-offset [+] CALL ;
: signal-handler-save-regs ( -- regs ) { } ;
: ip ( -- address ) arm64-assembler get ip>> ;
: >out ( instruction -- ) arm64-assembler get out>> push ;
-: ADRP ( imm Rd -- )
- [
- ip 12 on-bits unmask - -12 shift
- [ 2 bits ] [ -2 shift ] bi
- ] dip ADRP-encode >out ;
+: ADR ( imm21 Rd -- )
+ [ [ 2 bits ] [ 19 bits ] bi ] dip ADR-encode >out ;
+
+: ADRP ( imm21 Rd -- )
+ [ [ 2 bits ] [ 19 bits ] bi ] dip ADRP-encode >out ;
: BL ( offset -- ) ip - 4 / BL-encode >out ;
: BR ( register -- ) BR-encode >out ;
IN: cpu.arm.assembler.opcodes
! https://developer.arm.com/documentation/ddi0487/latest/
-! https://static.docs.arm.com/ddi0487/fb/DDI0487F_b_armv8_arm.pdf
+! https://static.docs.arm.com/ddi0487/fb/DDI0487F_b_armv8_arm.pdf ! initial work
+! https://static.docs.arm.com/ddi0487/fb/DDI0487G_a_armv8_arm.pdf ! 3/13/21
<<
SYNTAX: REGISTERS: