Merge branch 'master' into more_aggressive_coalescing

diff --combined basis/compiler/cfg/instructions/instructions.factor
index 6f9e7d03a9bd7d7f1229cba8449a47136d9c1d09,5b494a39d9d177477f9a71adeaac5bea3f9602d1..1eee379dd5069ceecfda9514485bc09f2271f6dc
--- 1/basis/compiler/cfg/instructions/instructions.factor
--- 2/basis/compiler/cfg/instructions/instructions.factor
+++ b/basis/compiler/cfg/instructions/instructions.factor
@@@ -657,7 -657,8 +657,8 @@@ literal: labe
  def: dst/int-rep
  use: src1/int-rep src2/int-rep ;
  
- TUPLE: spill-slot n ; C: <spill-slot> spill-slot
+ TUPLE: spill-slot { n integer } ;
+ C: <spill-slot> spill-slot
  
  INSN: _gc
  temp: temp1 temp2
@@@ -667,11 -668,11 +668,11 @@@ literal: data-values tagged-values unin
  ! virtual registers
  INSN: _spill
  use: src
- literal: rep n ;
+ literal: rep dst ;
  
  INSN: _reload
  def: dst
- literal: rep n ;
+ literal: rep src ;
  
  INSN: _spill-area-size
  literal: n ;
@@@ -707,10 -708,7 +708,10 @@@ UNION: kill-vreg-ins
  UNION: def-is-use-insn
  ##integer>bignum
  ##bignum>integer
 -##unbox-any-c-ptr ;
 +##string-nth
 +##unbox-any-c-ptr
 +##unary-float-function
 +##binary-float-function ;
  
  SYMBOL: vreg-insn
  

diff --combined basis/cpu/architecture/architecture.factor
index 0ddd477b8948a5e87a3ce192a2bcff07bb208705,114e63209ab01eb6e25fea2adff65631f94515ce..4bd95a38a4754fbe9e9d8b95b5f11126fb4a9214
--- 1/basis/cpu/architecture/architecture.factor
--- 2/basis/cpu/architecture/architecture.factor
+++ b/basis/cpu/architecture/architecture.factor
@@@ -135,6 -135,8 +135,6 @@@ M: ulonglong-2-rep scalar-rep-of drop u
  ! Mapping from register class to machine registers
  HOOK: machine-registers cpu ( -- assoc )
  
 -HOOK: two-operand? cpu ( -- ? )
 -
  HOOK: %load-immediate cpu ( reg obj -- )
  HOOK: %load-reference cpu ( reg obj -- )
  
@@@ -309,8 -311,8 +309,8 @@@ HOOK: %compare-imm-branch cpu ( label c
  HOOK: %compare-float-ordered-branch cpu ( label cc src1 src2 -- )
  HOOK: %compare-float-unordered-branch cpu ( label cc src1 src2 -- )
  
- HOOK: %spill cpu ( src rep n -- )
- HOOK: %reload cpu ( dst rep n -- )
+ HOOK: %spill cpu ( src rep dst -- )
+ HOOK: %reload cpu ( dst rep src -- )
  
  HOOK: %loop-entry cpu ( -- )
  

diff --combined basis/cpu/ppc/ppc.factor
index 01e8513b2f4a6408c5bf22f415e257fe376a7015,90e38a802bd7ade36a7bf23bd9c1d0c921b01b21..5c96131466f367a740cc993ee33f27232f100fa7
--- 1/basis/cpu/ppc/ppc.factor
--- 2/basis/cpu/ppc/ppc.factor
+++ b/basis/cpu/ppc/ppc.factor
@@@ -49,6 -49,8 +49,6 @@@ M: ppc machine-register
  CONSTANT: scratch-reg 30
  CONSTANT: fp-scratch-reg 30
  
 -M: ppc two-operand? f ;
 -
  M: ppc %load-immediate ( reg n -- ) swap LOAD ;
  
  M: ppc %load-reference ( reg obj -- )
@@@ -630,11 -632,11 +630,11 @@@ M:: ppc %compare-float-unordered-branc
          { stack-params [ [ [ 0 1 ] dip next-param@ LWZ 0 1 ] dip STW ] }
      } case ;
  
- M: ppc %spill ( src rep n -- )
-     swap [ spill@ ] dip store-to-frame ;
+ M: ppc %spill ( src rep dst -- )
+     swap [ n>> spill@ ] dip store-to-frame ;
  
- M: ppc %reload ( dst rep n -- )
-     swap [ spill@ ] dip load-from-frame ;
+ M: ppc %reload ( dst rep src -- )
+     swap [ n>> spill@ ] dip load-from-frame ;
  
  M: ppc %loop-entry ;
  

diff --combined basis/cpu/x86/x86.factor
index 3a41b331d9e2c3f180301b01285ba1e5c1eaac2f,51b5cef23a334ce9060c6b051e0cdb89a4a71891..e78519b9e0f389242bd78640176f700e9768d036
--- 1/basis/cpu/x86/x86.factor
--- 2/basis/cpu/x86/x86.factor
+++ b/basis/cpu/x86/x86.factor
@@@ -20,6 -20,8 +20,6 @@@ IN: cpu.x8
  M: label JMP 0 JMP rc-relative label-fixup ;
  M: label JUMPcc [ 0 ] dip JUMPcc rc-relative label-fixup ;
  
 -M: x86 two-operand? t ;
 -
  M: x86 vector-regs float-regs ;
  
  HOOK: stack-reg cpu ( -- reg )
@@@ -100,35 -102,26 +100,35 @@@ M: x86 %slot-imm ( dst obj slot tag -- 
  M: x86 %set-slot ( src obj slot -- ) [+] swap MOV ;
  M: x86 %set-slot-imm ( src obj slot tag -- ) (%slot-imm) swap MOV ;
  
 +:: two-operand ( dst src1 src2 rep -- dst src )
 +    dst src2 eq? [ "Cannot handle this case" throw ] when
 +    dst src1 rep %copy
 +    dst src2 ; inline
 +
 +:: one-operand ( dst src rep -- dst )
 +    dst src rep %copy
 +    dst ; inline
 +
  M: x86 %add     2over eq? [ nip ADD ] [ [+] LEA ] if ;
  M: x86 %add-imm 2over eq? [ nip ADD ] [ [+] LEA ] if ;
 -M: x86 %sub     nip SUB ;
 +M: x86 %sub     int-rep two-operand SUB ;
  M: x86 %sub-imm 2over eq? [ nip SUB ] [ neg [+] LEA ] if ;
 -M: x86 %mul     nip swap IMUL2 ;
 +M: x86 %mul     int-rep two-operand swap IMUL2 ;
  M: x86 %mul-imm IMUL3 ;
 -M: x86 %and     nip AND ;
 -M: x86 %and-imm nip AND ;
 -M: x86 %or      nip OR ;
 -M: x86 %or-imm  nip OR ;
 -M: x86 %xor     nip XOR ;
 -M: x86 %xor-imm nip XOR ;
 -M: x86 %shl-imm nip SHL ;
 -M: x86 %shr-imm nip SHR ;
 -M: x86 %sar-imm nip SAR ;
 -
 -M: x86 %min     nip [ CMP ] [ CMOVG ] 2bi ;
 -M: x86 %max     nip [ CMP ] [ CMOVL ] 2bi ;
 -
 -M: x86 %not     drop NOT ;
 +M: x86 %and     int-rep two-operand AND ;
 +M: x86 %and-imm int-rep two-operand AND ;
 +M: x86 %or      int-rep two-operand OR ;
 +M: x86 %or-imm  int-rep two-operand OR ;
 +M: x86 %xor     int-rep two-operand XOR ;
 +M: x86 %xor-imm int-rep two-operand XOR ;
 +M: x86 %shl-imm int-rep two-operand SHL ;
 +M: x86 %shr-imm int-rep two-operand SHR ;
 +M: x86 %sar-imm int-rep two-operand SAR ;
 +
 +M: x86 %min     int-rep two-operand [ CMP ] [ CMOVG ] 2bi ;
 +M: x86 %max     int-rep two-operand [ CMP ] [ CMOVL ] 2bi ;
 +
 +M: x86 %not     int-rep one-operand NOT ;
  M: x86 %log2    BSR ;
  
  GENERIC: copy-register* ( dst src rep -- )
@@@ -142,16 -135,23 +142,19 @@@ M: double-2-rep copy-register* drop MOV
  M: vector-rep copy-register* drop MOVDQU ;
  
  M: x86 %copy ( dst src rep -- )
-     2over eq? [ 3drop ] [ copy-register* ] if ;
+     2over eq? [ 3drop ] [
+         [ [ dup spill-slot? [ n>> spill@ ] when ] bi@ ] dip
+         copy-register*
+     ] if ;
  
 -:: overflow-template ( label dst src1 src2 insn -- )
 -    src1 src2 insn call
 -    label JO ; inline
 -
  M: x86 %fixnum-add ( label dst src1 src2 -- )
 -    [ ADD ] overflow-template ;
 +    int-rep two-operand ADD JO ;
  
  M: x86 %fixnum-sub ( label dst src1 src2 -- )
 -    [ SUB ] overflow-template ;
 +    int-rep two-operand SUB JO ;
  
  M: x86 %fixnum-mul ( label dst src1 src2 -- )
 -    [ swap IMUL2 ] overflow-template ;
 +    int-rep two-operand swap IMUL2 JO ;
  
  : bignum@ ( reg n -- op )
      cells bignum tag-number - [+] ; inline
@@@ -213,12 -213,12 +216,12 @@@ M:: x86 %bignum>integer ( dst src temp 
          "end" resolve-label
      ] with-scope ;
  
 -M: x86 %add-float nip ADDSD ;
 -M: x86 %sub-float nip SUBSD ;
 -M: x86 %mul-float nip MULSD ;
 -M: x86 %div-float nip DIVSD ;
 -M: x86 %min-float nip MINSD ;
 -M: x86 %max-float nip MAXSD ;
 +M: x86 %add-float double-rep two-operand ADDSD ;
 +M: x86 %sub-float double-rep two-operand SUBSD ;
 +M: x86 %mul-float double-rep two-operand MULSD ;
 +M: x86 %div-float double-rep two-operand DIVSD ;
 +M: x86 %min-float double-rep two-operand MINSD ;
 +M: x86 %max-float double-rep two-operand MAXSD ;
  M: x86 %sqrt SQRTSD ;
  
  M: x86 %single>double-float CVTSS2SD ;
@@@ -302,7 -302,6 +305,7 @@@ M: x86 %gather-vector-2-rep
      } available-reps ;
  
  M: x86 %add-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ ADDPS ] }
          { double-2-rep [ ADDPD ] }
@@@ -314,7 -313,7 +317,7 @@@
          { uint-4-rep [ PADDD ] }
          { longlong-2-rep [ PADDQ ] }
          { ulonglong-2-rep [ PADDQ ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %add-vector-reps
      {
@@@ -323,13 -322,12 +326,13 @@@
      } available-reps ;
  
  M: x86 %saturated-add-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { char-16-rep [ PADDSB ] }
          { uchar-16-rep [ PADDUSB ] }
          { short-8-rep [ PADDSW ] }
          { ushort-8-rep [ PADDUSW ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %saturated-add-vector-reps
      {
@@@ -337,11 -335,10 +340,11 @@@
      } available-reps ;
  
  M: x86 %add-sub-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ ADDSUBPS ] }
          { double-2-rep [ ADDSUBPD ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %add-sub-vector-reps
      {
@@@ -349,7 -346,6 +352,7 @@@
      } available-reps ;
  
  M: x86 %sub-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ SUBPS ] }
          { double-2-rep [ SUBPD ] }
@@@ -361,7 -357,7 +364,7 @@@
          { uint-4-rep [ PSUBD ] }
          { longlong-2-rep [ PSUBQ ] }
          { ulonglong-2-rep [ PSUBQ ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %sub-vector-reps
      {
@@@ -370,13 -366,12 +373,13 @@@
      } available-reps ;
  
  M: x86 %saturated-sub-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { char-16-rep [ PSUBSB ] }
          { uchar-16-rep [ PSUBUSB ] }
          { short-8-rep [ PSUBSW ] }
          { ushort-8-rep [ PSUBUSW ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %saturated-sub-vector-reps
      {
@@@ -384,7 -379,6 +387,7 @@@
      } available-reps ;
  
  M: x86 %mul-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ MULPS ] }
          { double-2-rep [ MULPD ] }
@@@ -392,7 -386,7 +395,7 @@@
          { ushort-8-rep [ PMULLW ] }
          { int-4-rep [ PMULLD ] }
          { uint-4-rep [ PMULLD ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %mul-vector-reps
      {
@@@ -406,11 -400,10 +409,11 @@@ M: x86 %saturated-mul-vector-rep
      { } ;
  
  M: x86 %div-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ DIVPS ] }
          { double-2-rep [ DIVPD ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %div-vector-reps
      {
@@@ -419,7 -412,6 +422,7 @@@
      } available-reps ;
  
  M: x86 %min-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { char-16-rep [ PMINSB ] }
          { uchar-16-rep [ PMINUB ] }
@@@ -429,7 -421,7 +432,7 @@@
          { uint-4-rep [ PMINUD ] }
          { float-4-rep [ MINPS ] }
          { double-2-rep [ MINPD ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %min-vector-reps
      {
@@@ -439,7 -431,6 +442,7 @@@
      } available-reps ;
  
  M: x86 %max-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { char-16-rep [ PMAXSB ] }
          { uchar-16-rep [ PMAXUB ] }
@@@ -449,7 -440,7 +452,7 @@@
          { uint-4-rep [ PMAXUD ] }
          { float-4-rep [ MAXPS ] }
          { double-2-rep [ MAXPD ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %max-vector-reps
      {
@@@ -494,12 -485,11 +497,12 @@@ M: x86 %sqrt-vector-rep
      } available-reps ;
  
  M: x86 %and-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ ANDPS ] }
          { double-2-rep [ ANDPD ] }
          [ drop PAND ]
 -    } case drop ;
 +    } case ;
  
  M: x86 %and-vector-reps
      {
@@@ -508,12 -498,11 +511,12 @@@
      } available-reps ;
  
  M: x86 %or-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ ORPS ] }
          { double-2-rep [ ORPD ] }
          [ drop POR ]
 -    } case drop ;
 +    } case ;
  
  M: x86 %or-vector-reps
      {
@@@ -522,12 -511,11 +525,12 @@@
      } available-reps ;
  
  M: x86 %xor-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { float-4-rep [ XORPS ] }
          { double-2-rep [ XORPD ] }
          [ drop PXOR ]
 -    } case drop ;
 +    } case ;
  
  M: x86 %xor-vector-reps
      {
@@@ -536,7 -524,6 +539,7 @@@
      } available-reps ;
  
  M: x86 %shl-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { short-8-rep [ PSLLW ] }
          { ushort-8-rep [ PSLLW ] }
@@@ -544,7 -531,7 +547,7 @@@
          { uint-4-rep [ PSLLD ] }
          { longlong-2-rep [ PSLLQ ] }
          { ulonglong-2-rep [ PSLLQ ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %shl-vector-reps
      {
@@@ -552,14 -539,13 +555,14 @@@
      } available-reps ;
  
  M: x86 %shr-vector ( dst src1 src2 rep -- )
 +    [ two-operand ] keep
      {
          { short-8-rep [ PSRAW ] }
          { ushort-8-rep [ PSRLW ] }
          { int-4-rep [ PSRAD ] }
          { uint-4-rep [ PSRLD ] }
          { ulonglong-2-rep [ PSRLQ ] }
 -    } case drop ;
 +    } case ;
  
  M: x86 %shr-vector-reps
      {
@@@ -954,11 -940,8 +957,8 @@@ M: x86 %compare-float-ordered-branch ( 
  M: x86 %compare-float-unordered-branch ( label src1 src2 cc -- )
      \ UCOMISD (%compare-float-branch) ;
  
- M:: x86 %spill ( src rep n -- )
-     n spill@ src rep %copy ;
- 
- M:: x86 %reload ( dst rep n -- )
-     dst n spill@ rep %copy ;
+ M:: x86 %spill ( src rep dst -- ) dst src rep %copy ;
+ M:: x86 %reload ( dst rep src -- ) dst src rep %copy ;
  
  M: x86 %loop-entry 16 code-alignment [ NOP ] times ;
  
@@@ -1006,6 -989,7 +1006,7 @@@ enable-fixnum-log
          enable-float-intrinsics
          enable-fsqrt
          enable-float-min/max
+         enable-float-functions
          install-sse2-check
      ] when ;